Line 48... |
Line 48... |
`define ICAPE_ACCESS
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`define ICAPE_ACCESS
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`endif
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`endif
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`define FLASH_ACCESS
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`define FLASH_ACCESS
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`define SDRAM_ACCESS
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`define SDRAM_ACCESS
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`define GPS_CLOCK
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`define GPS_CLOCK
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`ifdef VERILATOR
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`define GPSTB
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`endif
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// UART_ACCESS and GPS_UART have both been placed within fastio
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// UART_ACCESS and GPS_UART have both been placed within fastio
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// `define UART_ACCESS
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// `define UART_ACCESS
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// `define GPS_UART
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// `define GPS_UART
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`define RTC_ACCESS
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`define RTC_ACCESS
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`define OLEDRGB_ACCESS
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`define OLEDRGB_ACCESS
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Line 654... |
Line 657... |
scop_int, flash_int, rtc_pps };
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scop_int, flash_int, rtc_pps };
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wire [5:0] board_ints;
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wire [5:0] board_ints;
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wire [3:0] w_led;
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wire [3:0] w_led;
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wire rtc_ppd;
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wire rtc_ppd;
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fastio #(
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fastio #(
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.AUXUART_SETUP(30'hd705), // 115200 Baud, 8N1, from 81.25M
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.AUXUART_SETUP(30'd705), // 115200 Baud, 8N1, from 81.25M
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.GPSUART_SETUP(30'hd8464), // 9600 Baud, 8N1
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.GPSUART_SETUP(30'd8464), // 9600 Baud, 8N1
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.EXTRACLOCK(0)
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.EXTRACLOCK(0)
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) runio(i_clk, i_sw, i_btn,
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) runio(i_clk, i_sw, i_btn,
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w_led, o_clr_led0, o_clr_led1, o_clr_led2, o_clr_led3,
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w_led, o_clr_led0, o_clr_led1, o_clr_led2, o_clr_led3,
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i_aux_rx, o_aux_tx, o_aux_cts, i_gps_rx, o_gps_tx,
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i_aux_rx, o_aux_tx, o_aux_cts, i_gps_rx, o_gps_tx,
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wb_cyc, (io_sel)&&(wb_stb), wb_we, wb_addr[4:0],
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wb_cyc, (io_sel)&&(wb_stb), wb_we, wb_addr[4:0],
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wb_data, io_ack, io_stall, io_data,
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wb_data, io_ack, io_stall, io_data,
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rtc_ppd,
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rtc_ppd,
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bus_err_addr, master_ints, w_interrupt,
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bus_err_addr, gps_now[63:32], gps_step[47:16], master_ints, w_interrupt,
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board_ints);
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board_ints);
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assign { gpio_int, auxrx_int, auxtx_int, gpsrx_int, sw_int, btn_int } = board_ints;
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assign { gpio_int, auxrx_int, auxtx_int, gpsrx_int, sw_int, btn_int } = board_ints;
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/*
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/*
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reg [25:0] dbg_counter_err, dbg_counter_cyc, dbg_counter_sel,
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reg [25:0] dbg_counter_err, dbg_counter_cyc, dbg_counter_sel,
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