| Line 48... |
Line 48... |
`endif
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`endif
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// Wishbone control
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// Wishbone control
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i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr,
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i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr,
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i_wb_data, o_wb_ack, o_wb_stall, o_wb_data,
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i_wb_data, o_wb_ack, o_wb_stall, o_wb_data,
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// Cross-board I/O
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// Cross-board I/O
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i_rtc_ppd, i_buserr, i_gps_now, i_gps_step, i_other_ints, o_bus_int, o_board_ints);
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i_rtc_ppd, i_buserr, i_gps_sub, i_gps_step, i_other_ints, o_bus_int, o_board_ints);
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parameter AUXUART_SETUP = 30'd1736, // 115200 baud from 200MHz clk
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parameter AUXUART_SETUP = 30'd1736, // 115200 baud from 200MHz clk
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GPSUART_SETUP = 30'd20833, // 9600 baud from 200MHz clk
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GPSUART_SETUP = 30'd20833, // 9600 baud from 200MHz clk
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EXTRACLOCK = 1, // Do we need an extra clock to process?
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EXTRACLOCK = 1, // Do we need an extra clock to process?
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NGPI=0, NGPO=0; // Number of GPIO in and out wires
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NGPI=0, NGPO=0; // Number of GPIO in and out wires
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input i_clk;
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input i_clk;
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| Line 91... |
Line 91... |
// A strobe at midnight, to keep the calendar on "time"
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// A strobe at midnight, to keep the calendar on "time"
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input i_rtc_ppd;
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input i_rtc_ppd;
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// Address of the last bus error
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// Address of the last bus error
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input [31:0] i_buserr;
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input [31:0] i_buserr;
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// The current time, as produced by the GPS tracking processor
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// The current time, as produced by the GPS tracking processor
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input [31:0] i_gps_now, i_gps_step;
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input [31:0] i_gps_sub, i_gps_step;
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//
|
//
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// Interrupts -- both the output bus interrupt, as well as those
|
// Interrupts -- both the output bus interrupt, as well as those
|
// internally generated interrupts which may be used elsewhere
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// internally generated interrupts which may be used elsewhere
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// in the design
|
// in the design
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input wire [8:0] i_other_ints;
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input wire [8:0] i_other_ints;
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output wire o_bus_int;
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output wire o_bus_int;
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output wire [5:0] o_board_ints; // Button and switch interrupts
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output wire [6:0] o_board_ints; // Button and switch interrupts
|
|
|
wire [31:0] w_wb_data;
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wire [31:0] w_wb_data;
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wire [4:0] w_wb_addr;
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wire [4:0] w_wb_addr;
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wire w_wb_stb;
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wire w_wb_stb;
|
|
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| Line 131... |
Line 131... |
|
|
wire [31:0] pic_data;
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wire [31:0] pic_data;
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reg sw_int, btn_int;
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reg sw_int, btn_int;
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wire pps_int, rtc_int, netrx_int, nettx_int,
|
wire pps_int, rtc_int, netrx_int, nettx_int,
|
auxrx_int, auxtx_int, gpio_int, flash_int, scop_int,
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auxrx_int, auxtx_int, gpio_int, flash_int, scop_int,
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gpsrx_int, sd_int, oled_int, zip_int;
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gpsrx_int, gpstx_int, sd_int, oled_int, zip_int;
|
assign { zip_int, oled_int, rtc_int, sd_int,
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assign { zip_int, oled_int, rtc_int, sd_int,
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nettx_int, netrx_int, scop_int, flash_int,
|
nettx_int, netrx_int, scop_int, flash_int,
|
pps_int } = i_other_ints;
|
pps_int } = i_other_ints;
|
|
|
//
|
//
|
| Line 379... |
Line 379... |
always @(posedge i_clk)
|
always @(posedge i_clk)
|
if(((i_wb_stb)&&(~i_wb_we)&&(i_wb_addr == 5'h0e))||(auxrx_stb))
|
if(((i_wb_stb)&&(~i_wb_we)&&(i_wb_addr == 5'h0e))||(auxrx_stb))
|
r_auxrx_data[8] <= !auxrx_stb;
|
r_auxrx_data[8] <= !auxrx_stb;
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assign o_aux_cts = auxrx_stb;
|
assign o_aux_cts = auxrx_stb;
|
assign auxrx_data = { 20'h00, r_auxrx_data };
|
assign auxrx_data = { 20'h00, r_auxrx_data };
|
assign auxrx_int = r_auxrx_data[8];
|
assign auxrx_int = !r_auxrx_data[8];
|
|
|
//
|
//
|
// Then the auxilliary UART transmitter
|
// Then the auxilliary UART transmitter
|
//
|
//
|
wire auxtx_busy;
|
wire auxtx_busy;
|
| Line 403... |
Line 403... |
begin
|
begin
|
r_auxtx_stb <= 1'b0;
|
r_auxtx_stb <= 1'b0;
|
r_auxtx_data <= 8'h0;
|
r_auxtx_data <= 8'h0;
|
end
|
end
|
assign auxtx_data = { 20'h00,
|
assign auxtx_data = { 20'h00,
|
auxck_uart, o_aux_tx, r_auxtx_break, auxtx_busy,
|
1'b0, o_aux_tx, r_auxtx_break, auxtx_busy,
|
r_auxtx_data };
|
r_auxtx_data };
|
assign auxtx_int = ~auxtx_busy;
|
assign auxtx_int = ~auxtx_busy;
|
|
|
//////
|
//////
|
//
|
//
|
| Line 434... |
Line 434... |
end
|
end
|
always @(posedge i_clk)
|
always @(posedge i_clk)
|
if(((i_wb_stb)&&(~i_wb_we)&&(i_wb_addr == 5'h10))||(gpsrx_stb))
|
if(((i_wb_stb)&&(~i_wb_we)&&(i_wb_addr == 5'h10))||(gpsrx_stb))
|
r_gpsrx_data[8] <= !gpsrx_stb;
|
r_gpsrx_data[8] <= !gpsrx_stb;
|
assign gpsrx_data = { 20'h00, r_gpsrx_data };
|
assign gpsrx_data = { 20'h00, r_gpsrx_data };
|
assign gpsrx_int = r_gpsrx_data[8];
|
assign gpsrx_int = !r_gpsrx_data[8];
|
|
|
|
|
// Then the transmitter
|
// Then the transmitter
|
reg r_gpstx_break, r_gpstx_stb;
|
reg r_gpstx_break, r_gpstx_stb;
|
reg [7:0] r_gpstx_data;
|
reg [7:0] r_gpstx_data;
|
| Line 459... |
Line 459... |
r_gpstx_data <= 8'h0;
|
r_gpstx_data <= 8'h0;
|
end
|
end
|
assign gpstx_data = { 20'h00,
|
assign gpstx_data = { 20'h00,
|
gpsck_uart, o_gps_tx, r_gpstx_break, gpstx_busy,
|
gpsck_uart, o_gps_tx, r_gpstx_break, gpstx_busy,
|
r_gpstx_data };
|
r_gpstx_data };
|
|
assign gpstx_int = !gpstx_busy;
|
|
|
always @(posedge i_clk)
|
always @(posedge i_clk)
|
case(i_wb_addr)
|
case(i_wb_addr)
|
5'h00: o_wb_data <= `DATESTAMP;
|
5'h00: o_wb_data <= `DATESTAMP;
|
5'h01: o_wb_data <= pic_data;
|
5'h01: o_wb_data <= pic_data;
|
| Line 480... |
Line 481... |
5'h0d: o_wb_data <= gpio_data;
|
5'h0d: o_wb_data <= gpio_data;
|
5'h0e: o_wb_data <= auxrx_data;
|
5'h0e: o_wb_data <= auxrx_data;
|
5'h0f: o_wb_data <= auxtx_data;
|
5'h0f: o_wb_data <= auxtx_data;
|
5'h10: o_wb_data <= gpsrx_data;
|
5'h10: o_wb_data <= gpsrx_data;
|
5'h11: o_wb_data <= gpstx_data;
|
5'h11: o_wb_data <= gpstx_data;
|
5'h12: o_wb_data <= i_gps_now;
|
// 5'h12: o_wb_data <= i_gps_secs;
|
5'h13: o_wb_data <= i_gps_step;
|
5'h13: o_wb_data <= i_gps_sub;
|
|
5'h14: o_wb_data <= i_gps_step;
|
// 5'hf: UART_SETUP
|
// 5'hf: UART_SETUP
|
// 4'h6: GPIO
|
// 4'h6: GPIO
|
// ?? : GPS-UARTRX
|
// ?? : GPS-UARTRX
|
// ?? : GPS-UARTTX
|
// ?? : GPS-UARTTX
|
default: o_wb_data <= 32'h00;
|
default: o_wb_data <= 32'h00;
|
endcase
|
endcase
|
|
|
assign o_wb_stall = 1'b0;
|
assign o_wb_stall = 1'b0;
|
always @(posedge i_clk)
|
always @(posedge i_clk)
|
o_wb_ack <= (i_wb_stb);
|
o_wb_ack <= (i_wb_stb);
|
assign o_board_ints = { gpio_int, auxrx_int, auxtx_int, gpsrx_int, sw_int, btn_int };
|
assign o_board_ints = { gpio_int, auxrx_int, auxtx_int,
|
|
gpsrx_int, gpstx_int, sw_int, btn_int };
|
|
|
|
|
endmodule
|
endmodule
|
|
|
No newline at end of file
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No newline at end of file
|
