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Line 31... |
//
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//
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//
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//
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///////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include "zipcpu.h"
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#include "zipsys.h"
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#include "zipsys.h"
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#include "artyboard.h"
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#include "artyboard.h"
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#ifndef NULL
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#ifndef NULL
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#define NULL (void *)0
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#define NULL (void *)0
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#endif
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#endif
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static volatile int *const UARTTX = &((IOSPACE *)0x0100)->io_uart_tx,
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static volatile int *const UARTTX = &((IOSPACE *)0x0100)->io_uart_tx,
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*const UART_CTRL = &((IOSPACE *)0x0100)->io_auxsetup;
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*const UART_CTRL = &((IOSPACE *)0x0100)->io_auxsetup;
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static volatile int * const PIC = (volatile int *)0xc0000000;
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static volatile int * const PIC = (volatile int *)0xff000000;
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static const int INT_UARTTX = SYSINT_UARTTX; // 0x2000;
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static const int INT_UARTTX = SYSINT_UARTTX; // 0x2000;
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static volatile int *const COUNTER = &((ZIPSYS *)ZIPSYS_ADDR)->m.ck;
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static volatile int *const COUNTER = &((ZIPSYS *)ZIPSYS_ADDR)->z_m.ac_ck;
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#define HAVE_COUNTER
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#define HAVE_COUNTER
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#define HAVE_SCOPE
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#define HAVE_SCOPE
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#define SCOPEc sys->io_scope[0].s_ctrl
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#define SCOPEc sys->io_scope[0].s_ctrl
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#define SCOPE_DELAY 4
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#define SCOPE_DELAY 4
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#define TRIGGER_SCOPE_NOW (SCOPE_TRIGGER|SCOPE_DELAY)
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#define TRIGGER_SCOPE_NOW (SCOPE_TRIGGER|SCOPE_DELAY)
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#define PREPARE_SCOPE SCOPE_DELAY
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#define PREPARE_SCOPE SCOPE_DELAY
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unsigned zip_ucc(void);
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unsigned zip_ucc(void);
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unsigned zip_cc(void);
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void zip_save_context(int *);
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void zip_save_context(int *);
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void zip_halt(void);
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void zip_halt(void);
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void txchr(char v);
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void txchr(char v);
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Line 119... |
"\tMOV\tR3,uR6\n"
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"\tMOV\tR3,uR6\n"
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"\tMOV\tR3,uR7\n"
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"\tMOV\tR3,uR7\n"
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"\tMOV\tR3,uR8\n"
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"\tMOV\tR3,uR8\n"
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"\tMOV\tR3,uR9\n"
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"\tMOV\tR3,uR9\n"
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"\tMOV\tR3,uR10\n"
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"\tMOV\tR3,uR10\n"
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"\tMOV\tR3,uR11\n" // uR11 = pc
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"\tMOV\tR3,uR11\n"
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"\tMOV\tR3,uR12\n" // uR12 = pc
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"\tMOV\tR3,uR12\n"
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"\tMOV\tR2,uSP\n" // uSP = stack
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"\tMOV\tR2,uSP\n" // uSP = stack
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"\tMOV\t0x20+R3,uCC\n" // Clear uCC of all but the GIE bit
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"\tMOV\t0x20+R3,uCC\n" // Clear uCC of all but the GIE bit
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"\tMOV\tR1,uPC\n" // uPC = pc
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"\tMOV\tR1,uPC\n" // uPC = pc
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"\tRTU\n"
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"\tRTU\n"
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"test_return:\n"
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"test_return:\n"
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Line 180... |
"break_two:\n"
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"break_two:\n"
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"\tLDI\t0,R1\n"
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"\tLDI\t0,R1\n"
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"\tJMP\tR0\n"
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"\tJMP\tR0\n"
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"\tBREAK\n");
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"\tBREAK\n");
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void break_three(void);
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// Can we jump to a break, and still have the uPC match
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asm("\t.text\n\t.global\tbreak_three\n"
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"\t.type\tbreak_three,@function\n"
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// R1 = 0 by default from calling. This will return as though
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// we had succeeded.
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"break_three:\n"
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"\tBREAK\n");
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void early_branch_test(void);
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void early_branch_test(void);
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asm("\t.text\n\t.global\tearly_branch_test\n"
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asm("\t.text\n\t.global\tearly_branch_test\n"
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"\t.type\tearly_branch_test,@function\n"
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"\t.type\tearly_branch_test,@function\n"
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"early_branch_test:\n"
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"early_branch_test:\n"
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"\tLDI\t1,R1\n"
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"\tLDI\t1,R1\n"
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Line 1146... |
txreg("uSP : ", context[13]);
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txreg("uSP : ", context[13]);
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txreg("uCC : ", context[14]);
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txreg("uCC : ", context[14]);
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txreg("uPC : ", context[15]);
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txreg("uPC : ", context[15]);
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txstr("\r\n\r\n");
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txstr("\r\n\r\n");
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// While previous versions of cputest.c called zip_busy(), here we
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// reject that notion for the simple reason that zip_busy may not
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// necessarily halt any Verilator simulation. Instead, we try to
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// halt the CPU.
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while(1)
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while(1)
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zip_halt();
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zip_halt();
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}
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}
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void testid(const char *str) {
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void testid(const char *str) {
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Line 1216... |
testid("Break test #2"); MARKSTART;
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testid("Break test #2"); MARKSTART;
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if ((run_test(break_two, user_stack_ptr))||(zip_ucc()&0x1d90))
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if ((run_test(break_two, user_stack_ptr))||(zip_ucc()&0x1d90))
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test_fails(start_time, &testlist[tnum]);
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test_fails(start_time, &testlist[tnum]);
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txstr("Pass\r\n"); testlist[tnum++] = 0; // #1
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txstr("Pass\r\n"); testlist[tnum++] = 0; // #1
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// Test break instruction in user mode
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// Make sure that a decision on the clock prior won't still cause a
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// break condition
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testid("Break test #3"); MARKSTART;
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run_test(break_three, user_stack_ptr);
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if ((context[15] != (int)break_three) // Insist we stop at the break
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||(0==(zip_ucc()&0x80)) // insn, that the break flag is
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||(zip_ucc()&0x01d10)) // set, and no other excpt flags
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test_fails(start_time, &testlist[tnum]);
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txstr("Pass\r\n"); testlist[tnum++] = 0; // 0
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// LJMP test ... not (yet) written
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// LJMP test ... not (yet) written
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// Test the early branching capability
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// Test the early branching capability
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// Does it successfully clear whatever else is in the pipeline?
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// Does it successfully clear whatever else is in the pipeline?
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testid("Early Branch test"); MARKSTART;
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testid("Early Branch test"); MARKSTART;
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