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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: flashdrvr.cpp
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// Filename: flashdrvr.cpp
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//
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//
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// Project: FPGA library development (Basys3 development board)
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// Project: OpenArty, an entirely open SoC based upon the Arty platform
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//
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// Purpose: Flash driver. Encapsulates the erasing and programming (i.e.
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// writing) necessary to set the values in a flash device.
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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//
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// Purpose: Flash driver. Encapsulate writing to the flash device.
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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//
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// Creator: Dan Gisselquist
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// Gisselquist Tecnology, LLC
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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//
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// Copyright: 2015
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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#include "regdefs.h"
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#include "regdefs.h"
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#include "flashdrvr.h"
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#include "flashdrvr.h"
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const bool HIGH_SPEED = false;
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const bool HIGH_SPEED = false;
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#define SETSCOPE m_fpga->writeio(R_QSCOPE, 8180)
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void FLASHDRVR::flwait(void) {
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void FLASHDRVR::flwait(void) {
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DEVBUS::BUSW v;
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DEVBUS::BUSW v;
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v = m_fpga->readio(R_QSPI_EREG);
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v = m_fpga->readio(R_QSPI_EREG);
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if ((v&ERASEFLAG)==0)
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if ((v&ERASEFLAG)==0)
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}
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}
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} while(v & ERASEFLAG);
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} while(v & ERASEFLAG);
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}
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}
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bool FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
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bool FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
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DEVBUS::BUSW page[SZPAGE];
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DEVBUS::BUSW page[SZPAGEW];
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printf("Erasing sector: %08x\n", sector);
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printf("Erasing sector: %08x\n", sector);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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SETSCOPE;
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m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
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m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
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// If we're in high speed mode and we want to verify the erase, then
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// If we're in high speed mode and we want to verify the erase, then
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// we can skip waiting for the erase to complete by issueing a read
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// we can skip waiting for the erase to complete by issueing a read
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// command immediately. As soon as the erase completes the read will
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// command immediately. As soon as the erase completes the read will
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if ((!HIGH_SPEED)||(!verify_erase)) {
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if ((!HIGH_SPEED)||(!verify_erase)) {
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flwait();
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flwait();
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printf("@%08x -> %08x\n", R_QSPI_EREG,
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printf("@%08x -> %08x\n", R_QSPI_EREG,
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m_fpga->readio(R_QSPI_EREG));
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m_fpga->readio(R_QSPI_EREG));
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printf("@%08x -> %08x\n", R_QSPI_SREG,
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printf("@%08x -> %08x\n", R_QSPI_STAT,
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m_fpga->readio(R_QSPI_SREG));
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m_fpga->readio(R_QSPI_STAT));
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printf("@%08x -> %08x\n", sector,
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printf("@%08x -> %08x\n", sector,
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m_fpga->readio(sector));
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m_fpga->readio(sector));
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}
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}
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// Now, let's verify that we erased the sector properly
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// Now, let's verify that we erased the sector properly
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if (verify_erase) {
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if (verify_erase) {
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for(int i=0; i<NPAGES; i++) {
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for(int i=0; i<NPAGES; i++) {
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m_fpga->readi(sector+i*SZPAGE, SZPAGE, page);
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m_fpga->readi(sector+i*SZPAGEW, SZPAGEW, page);
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for(int i=0; i<SZPAGE; i++)
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for(int i=0; i<SZPAGEW; i++)
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if (page[i] != 0xffffffff)
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if (page[i] != 0xffffffff)
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return false;
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return false;
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}
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}
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}
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}
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return true;
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return true;
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}
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}
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bool FLASHDRVR::write_page(const unsigned addr, const unsigned len,
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bool FLASHDRVR::write_page(const unsigned addr, const unsigned len,
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const unsigned *data, const bool verify_write) {
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const unsigned *data, const bool verify_write) {
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DEVBUS::BUSW buf[SZPAGE];
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DEVBUS::BUSW buf[SZPAGEW];
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assert(len > 0);
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assert(len > 0);
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assert(len <= PGLEN);
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assert(len <= PGLENW);
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assert(PAGEOF(addr)==PAGEOF(addr+len-1));
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assert(PAGEOF(addr)==PAGEOF(addr+len-1));
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if (len <= 0)
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if (len <= 0)
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return true;
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return true;
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m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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m_fpga->clear();
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m_fpga->clear();
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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printf("Writing page: 0x%08x - 0x%08x\n", addr, addr+len-1);
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printf("Writing page: 0x%08x - 0x%08x\n", addr, addr+len-1);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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SETSCOPE;
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m_fpga->writei(addr, len, data);
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m_fpga->writei(addr, len, data);
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// If we're in high speed mode and we want to verify the write, then
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// If we're in high speed mode and we want to verify the write, then
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// we can skip waiting for the write to complete by issueing a read
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// we can skip waiting for the write to complete by issueing a read
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// command immediately. As soon as the write completes the read will
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// command immediately. As soon as the write completes the read will
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// Because the status register may invoke protections here, we
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// Because the status register may invoke protections here, we
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// void them.
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// void them.
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// m_fpga->writeio(R_QSPI_SREG, 0);
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// m_fpga->writeio(R_QSPI_SREG, 0);
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// m_fpga->readio(R_VERSION); // Read something innocuous
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// m_fpga->readio(R_VERSION); // Read something innocuous
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for(unsigned s=SECTOROF(addr); s<SECTOROF(addr+len+SECTORSZ-1); s+=SECTORSZ) {
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for(unsigned s=SECTOROF(addr); s<SECTOROF(addr+len+SECTORSZW-1); s+=SECTORSZW) {
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// printf("IN LOOP, s=%08x\n", s);
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// printf("IN LOOP, s=%08x\n", s);
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// Do we need to erase?
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// Do we need to erase?
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bool need_erase = false;
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bool need_erase = false;
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unsigned newv = 0; // (s<addr)?addr:s;
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unsigned newv = 0; // (s<addr)?addr:s;
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{
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{
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DEVBUS::BUSW *sbuf = new DEVBUS::BUSW[SECTORSZ];
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DEVBUS::BUSW *sbuf = new DEVBUS::BUSW[SECTORSZW];
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const DEVBUS::BUSW *dp;
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const DEVBUS::BUSW *dp;
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unsigned base,ln;
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unsigned base,ln;
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base = (addr>s)?addr:s;
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base = (addr>s)?addr:s;
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ln=((addr+len>s+SECTORSZ)?(s+SECTORSZ):(addr+len))-base;
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ln=((addr+len>s+SECTORSZW)?(s+SECTORSZW):(addr+len))-base;
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m_fpga->readi(base, ln, sbuf);
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m_fpga->readi(base, ln, sbuf);
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dp = &data[base-addr];
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dp = &data[base-addr];
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for(unsigned i=0; i<ln; i++) {
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for(unsigned i=0; i<ln; i++) {
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if ((sbuf[i]&dp[i]) != dp[i]) {
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if ((sbuf[i]&dp[i]) != dp[i]) {
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if (!erase_sector(s, verify)) {
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if (!erase_sector(s, verify)) {
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printf("SECTOR ERASE FAILED!\n");
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printf("SECTOR ERASE FAILED!\n");
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return false;
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return false;
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} newv = (s<addr) ? addr : s;
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} newv = (s<addr) ? addr : s;
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}
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}
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for(unsigned p=newv; (p<s+SECTORSZ)&&(p<addr+len); p=PAGEOF(p+PGLEN)) {
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for(unsigned p=newv; (p<s+SECTORSZW)&&(p<addr+len); p=PAGEOF(p+PGLENW)) {
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unsigned start = p, len = addr+len-start;
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unsigned start = p, len = addr+len-start;
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// BUT! if we cross page boundaries, we need to clip
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// BUT! if we cross page boundaries, we need to clip
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// our results to the page boundary
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// our results to the page boundary
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if (PAGEOF(start+len-1)!=PAGEOF(start))
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if (PAGEOF(start+len-1)!=PAGEOF(start))
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len = PAGEOF(start+PGLEN)-start;
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len = PAGEOF(start+PGLENW)-start;
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if (!write_page(start, len, &data[p-addr], verify)) {
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if (!write_page(start, len, &data[p-addr], verify)) {
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printf("WRITE-PAGE FAILED!\n");
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printf("WRITE-PAGE FAILED!\n");
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return false;
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return false;
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}
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}
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}
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}
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}
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}
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m_fpga->writeio(R_QSPI_EREG, 0); // Re-enable write protection
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m_fpga->writeio(R_QSPI_EREG, ENABLEWP); // Re-enable write protection
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return true;
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return true;
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}
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}
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No newline at end of file
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No newline at end of file
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