Line 82... |
Line 82... |
}
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}
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bool FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
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bool FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
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DEVBUS::BUSW page[SZPAGEW];
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DEVBUS::BUSW page[SZPAGEW];
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|
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printf("EREG before : %08x\n", m_fpga->readio(R_QSPI_EREG));
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printf("Erasing sector: %08x\n", sector);
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printf("Erasing sector: %08x\n", sector);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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printf("EREG with WEL : %08x\n", m_fpga->readio(R_QSPI_EREG));
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SETSCOPE;
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SETSCOPE;
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m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
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m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
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printf("EREG after : %08x\n", m_fpga->readio(R_QSPI_EREG));
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// If we're in high speed mode and we want to verify the erase, then
|
// If we're in high speed mode and we want to verify the erase, then
|
// we can skip waiting for the erase to complete by issueing a read
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// we can skip waiting for the erase to complete by issueing a read
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// command immediately. As soon as the erase completes the read will
|
// command immediately. As soon as the erase completes the read will
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// begin sending commands back. This allows us to recover the lost
|
// begin sending commands back. This allows us to recover the lost
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Line 158... |
Line 161... |
}
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}
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} // printf("\nVerify success\n");
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} // printf("\nVerify success\n");
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} return true;
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} return true;
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}
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}
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|
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#define VCONF_VALUE 0x8b
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|
|
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bool FLASHDRVR::verify_config(void) {
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unsigned cfg = m_fpga->readio(R_QSPI_VCONF);
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printf("CFG = %02x\n", cfg);
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return (cfg == VCONF_VALUE);
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}
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|
|
|
void FLASHDRVR::set_config(void) {
|
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// There is some delay associated with these commands, but it should
|
|
// be dwarfed by the communication delay. If you wish to do this on the
|
|
// device itself, you may need to use some timers.
|
|
//
|
|
// Set the write-enable latch
|
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
|
|
// Set the volatile configuration register
|
|
m_fpga->writeio(R_QSPI_VCONF, VCONF_VALUE);
|
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// Clear the write-enable latch, since it didn't clear automatically
|
|
printf("EREG = %08x\n", m_fpga->readio(R_QSPI_EREG));
|
|
m_fpga->writeio(R_QSPI_EREG, ENABLEWP);
|
|
}
|
|
|
bool FLASHDRVR::write(const unsigned addr, const unsigned len,
|
bool FLASHDRVR::write(const unsigned addr, const unsigned len,
|
const unsigned *data, const bool verify) {
|
const unsigned *data, const bool verify) {
|
|
|
|
if (!verify_config()) {
|
|
set_config();
|
|
if (!verify_config())
|
|
return false;
|
|
}
|
|
|
// Work through this one sector at a time.
|
// Work through this one sector at a time.
|
// If this buffer is equal to the sector value(s), go on
|
// If this buffer is equal to the sector value(s), go on
|
// If not, erase the sector
|
// If not, erase the sector
|
|
|
/*
|
|
fprintf(stderr, "FLASH->write(%08x, %d, ..., %s)\n", addr, len,
|
|
(verify)?"Verify":"");
|
|
*/
|
|
// m_fpga->writeio(R_QSPI_CREG, 2);
|
// m_fpga->writeio(R_QSPI_CREG, 2);
|
// m_fpga->readio(R_VERSION); // Read something innocuous
|
// m_fpga->readio(R_VERSION); // Read something innocuous
|
|
|
// Just to make sure the driver knows that these values are ...
|
// Just to make sure the driver knows that these values are ...
|
// m_fpga->readio(R_QSPI_CREG);
|
// m_fpga->readio(R_QSPI_CREG);
|