URL https://opencores.org/ocsvn/opencpu32/opencpu32/trunk

Subversion Repositories opencpu32

[/] [opencpu32/] [trunk/] [hdl/] [opencpu32/] [ControlUnit.vhd] - Diff between revs 44 and 46

Rev 44	Rev 46
Line 144...	Line 144...
`PC <= "0000000000" & operand_imm;`	`PC <= "0000000000" & operand_imm;`

`when jmpr_val =>`	`when jmpr_val =>`
`PC <= PC + ("0000000000" & operand_imm);`	`PC <= PC + ("0000000000" & operand_imm);`

	`-- ld r5,20 (Load into r5 register the content of the memory at address 20)`
`when ld_val =>`	`when ld_val =>`
`MemoryDataRdAddr <= "0000000000" & operand_imm;`	`MemoryDataRdAddr <= "0000000000" & operand_imm;`
`MemoryDataReadEn <= '1';`	`MemoryDataReadEn <= '1';`
	`if cyclesExecute = 0 then`
	`MemoryDataReadEn <= '0';`
	`end if;`

`-- STORE r1,10 (Store the value 10 on memory address pointed by r1)`	`-- STORE r1,10 (Store the value 10 on memory address pointed by r1)`
`when stom_val =>`	`when stom_val =>`
`-- And put the imediate value ...`	`-- And put the imediate value ...`
`MemoryDataOut <= "0000000000" & operand_imm;`	`MemoryDataOut <= "0000000000" & operand_imm;`