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| Rev 19 |
Rev 20 |
| Line 99... |
Line 99... |
S => muxOut
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S => muxOut
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);
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);
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--! Instantiate the Unit Under Test (Alu) (Doxygen bug if it's not commented!)
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--! Instantiate the Unit Under Test (Alu) (Doxygen bug if it's not commented!)
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uAlu: Alu PORT MAP (
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uAlu: Alu PORT MAP (
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A => muxOut,
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A => regFilePortA,
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B => regFilePortA,
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B => regFilePortB,
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S => aluOut,
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S => aluOut,
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sel => aluOp
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sel => aluOp
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);
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);
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--! Instantiate the Unit Under Test (RegisterFile) (Doxygen bug if it's not commented!)
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--! Instantiate the Unit Under Test (RegisterFile) (Doxygen bug if it's not commented!)
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