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constant nBits : integer := 32;
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constant nBits : integer := 32;
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--! Number of general registers (r0..r15)
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--! Number of general registers (r0..r15)
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constant numGenRegs : integer := 16;
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constant numGenRegs : integer := 16;
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type aluOps is (alu_pass, alu_sum, alu_sub, alu_inc, alu_dec, alu_mul, alu_or, alu_and,
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type aluOps is (alu_pass, alu_passB, alu_sum, alu_sub, alu_inc, alu_dec, alu_mul, alu_or, alu_and,
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alu_xor, alu_not, alu_shfLt, alu_shfRt, alu_roLt, alu_roRt);
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alu_xor, alu_not, alu_shfLt, alu_shfRt, alu_roLt, alu_roRt);
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type typeEnDis is (enable, disable);
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type typeEnDis is (enable, disable);
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type generalRegisters is (r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15);
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type generalRegisters is (r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15);
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type dpMuxInputs is (fromMemory, fromImediate, fromRegFileA, fromRegFileB, fromAlu);
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function reg2Num (a: generalRegisters) return integer;
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function reg2Num (a: generalRegisters) return integer;
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function Num2reg (a: integer) return generalRegisters;
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function Num2reg (a: integer) return generalRegisters;
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function muxPos( a: dpMuxInputs) return std_logic_vector;
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end pkgOpenCPU32;
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end pkgOpenCPU32;
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--! Define functions or procedures
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--! Define functions or procedures
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package body pkgOpenCPU32 is
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package body pkgOpenCPU32 is
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function muxPos( a: dpMuxInputs) return std_logic_vector is
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variable valRet : std_logic_vector(2 downto 0);
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begin
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case a is
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when fromMemory => valRet := "000";
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when fromImediate => valRet := "001";
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when fromRegFileA => valRet := "010";
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when fromRegFileB => valRet := "011";
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when fromAlu => valRet := "100";
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end case;
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return valRet;
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end muxPos;
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function reg2Num (a: generalRegisters) return integer is
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function reg2Num (a: generalRegisters) return integer is
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variable valRet : integer;
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variable valRet : integer;
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begin
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begin
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case a is
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case a is
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when r0 => valRet := 0;
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when r0 => valRet := 0;
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