Line 65... |
Line 65... |
B_Out => B_Out
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B_Out => B_Out
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);
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);
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--! Process that will stimulate all register assignments, and reads...
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--! Process that will stimulate all register assignments, and reads...
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stim_proc: process
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stim_proc: process
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variable allZ : std_logic_vector((nBits - 1) downto 0) := (others => 'Z');
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begin
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begin
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-- r0=1 ... r15=16---------------------------------------------------------------------------
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-- r0=1 ... r15=16---------------------------------------------------------------------------
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clk <= '0';
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clk <= '0';
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REPORT "Write r0 := 1" SEVERITY NOTE;
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REPORT "Write r0 := 1" SEVERITY NOTE;
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writeEn <= '1';
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writeEn <= '1';
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Line 121... |
Line 122... |
REPORT "Check r0 = 1" SEVERITY NOTE;
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REPORT "Check r0 = 1" SEVERITY NOTE;
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Read_A_En <= '1';
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Read_A_En <= '1';
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Read_A_Addr <= r0;
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Read_A_Addr <= r0;
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wait for 1 ns; -- Wait to stabilize the response
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wait for 1 ns; -- Wait to stabilize the response
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assert A_Out = conv_std_logic_vector(1, nBits) report "Invalid value r0" severity FAILURE;
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assert A_Out = conv_std_logic_vector(1, nBits) report "Invalid value r0" severity FAILURE;
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assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
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REPORT "Check r1 = 2" SEVERITY NOTE;
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REPORT "Check r1 = 2" SEVERITY NOTE;
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Read_A_En <= '1';
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Read_A_En <= '1';
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Read_A_Addr <= r1;
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Read_A_Addr <= r1;
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wait for 1 ns; -- Wait to stabilize the response
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wait for 1 ns; -- Wait to stabilize the response
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assert A_Out = conv_std_logic_vector(2, nBits) report "Invalid value r1" severity FAILURE;
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assert A_Out = conv_std_logic_vector(2, nBits) report "Invalid value r1" severity FAILURE;
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assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
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REPORT "Check r2 = 3" SEVERITY NOTE;
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REPORT "Check r2 = 3" SEVERITY NOTE;
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Read_A_En <= '1';
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Read_A_En <= '1';
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Read_A_Addr <= r2;
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Read_A_Addr <= r2;
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wait for 1 ns; -- Wait to stabilize the response
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wait for 1 ns; -- Wait to stabilize the response
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assert A_Out = conv_std_logic_vector(3, nBits) report "Invalid value r2" severity FAILURE;
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assert A_Out = conv_std_logic_vector(3, nBits) report "Invalid value r2" severity FAILURE;
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assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
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|
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REPORT "Check r3 = 4" SEVERITY NOTE;
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REPORT "Check r3 = 4" SEVERITY NOTE;
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Read_A_En <= '1';
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Read_A_En <= '1';
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Read_A_Addr <= r3;
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Read_A_Addr <= r3;
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wait for 1 ns; -- Wait to stabilize the response
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wait for 1 ns; -- Wait to stabilize the response
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assert A_Out = conv_std_logic_vector(4, nBits) report "Invalid value r3" severity FAILURE;
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assert A_Out = conv_std_logic_vector(4, nBits) report "Invalid value r3" severity FAILURE;
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assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
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|
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REPORT "Check r4 = 5" SEVERITY NOTE;
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REPORT "Check r4 = 5" SEVERITY NOTE;
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Read_A_En <= '1';
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Read_A_En <= '1';
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Read_A_Addr <= r4;
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Read_A_Addr <= r4;
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wait for 1 ns; -- Wait to stabilize the response
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wait for 1 ns; -- Wait to stabilize the response
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assert A_Out = conv_std_logic_vector(5, nBits) report "Invalid value r4" severity FAILURE;
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assert A_Out = conv_std_logic_vector(5, nBits) report "Invalid value r4" severity FAILURE;
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assert B_Out = allZ report "PortB should be high impedance" severity FAILURE;
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|
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wait;
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wait;
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end process;
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end process;
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END;
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END;
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