Line 895... |
Line 895... |
vid_ram1_frame_select <= 2'h0;
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vid_ram1_frame_select <= 2'h0;
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end
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end
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else if (frame_select_wr)
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else if (frame_select_wr)
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begin
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begin
|
refresh_frame_select <= per_din_i[1:0];
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refresh_frame_select <= per_din_i[1:0];
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vid_ram0_frame_select <= per_din_i[5:4];
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vid_ram0_frame_select <= per_din_i[9:8];
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vid_ram1_frame_select <= per_din_i[7:6];
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vid_ram1_frame_select <= per_din_i[13:12];
|
end
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end
|
|
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wire [15:0] frame_select = {8'h00, vid_ram1_frame_select, vid_ram0_frame_select, 2'h0, refresh_frame_select};
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wire [15:0] frame_select = {2'h0, vid_ram1_frame_select, 2'h0, vid_ram0_frame_select, 6'h00, refresh_frame_select};
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`else
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`else
|
reg refresh_frame_select;
|
reg refresh_frame_select;
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reg vid_ram0_frame_select;
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reg vid_ram0_frame_select;
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reg vid_ram1_frame_select;
|
reg vid_ram1_frame_select;
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|
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Line 915... |
Line 915... |
vid_ram1_frame_select <= 1'h0;
|
vid_ram1_frame_select <= 1'h0;
|
end
|
end
|
else if (frame_select_wr)
|
else if (frame_select_wr)
|
begin
|
begin
|
refresh_frame_select <= per_din_i[0];
|
refresh_frame_select <= per_din_i[0];
|
vid_ram0_frame_select <= per_din_i[4];
|
vid_ram0_frame_select <= per_din_i[8];
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vid_ram1_frame_select <= per_din_i[6];
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vid_ram1_frame_select <= per_din_i[12];
|
end
|
end
|
|
|
wire [15:0] frame_select = {8'h00, 1'h0, vid_ram1_frame_select, 1'h0, vid_ram0_frame_select, 2'h0, 1'h0, refresh_frame_select};
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wire [15:0] frame_select = {3'h0, vid_ram1_frame_select, 3'h0, vid_ram0_frame_select, 7'h00, refresh_frame_select};
|
`endif
|
`endif
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`else
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`else
|
wire [15:0] frame_select = 16'h0000;
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wire [15:0] frame_select = 16'h0000;
|
`endif
|
`endif
|
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|