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Flow report for Open_JTAG
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Wed Jun 02 16:01:15 2010
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Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Flow Summary
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3. Flow Settings
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4. Flow Non-Default Global Settings
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5. Flow Elapsed Time
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6. Flow OS Summary
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7. Flow Log
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2010 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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+------------------------------------------------------------------------+
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; Flow Summary ;
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+-------------------------+----------------------------------------------+
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; Flow Status ; Successful - Wed Jun 02 16:01:15 2010 ;
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; Quartus II Version ; 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition ;
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; Revision Name ; Open_JTAG ;
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; Top-level Entity Name ; Open_JTAG ;
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; Family ; MAX II ;
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; Device ; EPM570T100C5 ;
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; Timing Models ; Final ;
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; Met timing requirements ; Yes ;
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; Total logic elements ; 245 / 570 ( 43 % ) ;
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; Total pins ; 29 / 76 ( 38 % ) ;
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; Total virtual pins ; 0 ;
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; UFM blocks ; 0 / 1 ( 0 % ) ;
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+-------------------------+----------------------------------------------+
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+-----------------------------------------+
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; Flow Settings ;
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+-------------------+---------------------+
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; Option ; Setting ;
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+-------------------+---------------------+
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; Start date & time ; 06/02/2010 16:01:02 ;
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; Main task ; Compilation ;
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; Revision Name ; Open_JTAG ;
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+-------------------+---------------------+
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+--------------------------------------------------------------------------------------------------------------------+
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; Flow Non-Default Global Settings ;
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+---------------------------------------+-----------------------------+---------------+-------------+----------------+
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; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
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+---------------------------------------+-----------------------------+---------------+-------------+----------------+
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; COMPILER_SIGNATURE_ID ; 95639322573.127548726201860 ; -- ; -- ; -- ;
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; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
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; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
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; POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR ; 3.3V ; -- ; -- ; -- ;
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; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
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+---------------------------------------+-----------------------------+---------------+-------------+----------------+
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+-----------------------------------------------------------------------------------------------------------------------------+
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; Flow Elapsed Time ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Analysis & Synthesis ; 00:00:05 ; 1.0 ; 187 MB ; 00:00:04 ;
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; Fitter ; 00:00:03 ; 1.0 ; 155 MB ; 00:00:01 ;
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; Assembler ; 00:00:01 ; 1.0 ; 142 MB ; 00:00:00 ;
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; Classic Timing Analyzer ; 00:00:01 ; 1.0 ; 113 MB ; 00:00:01 ;
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; Total ; 00:00:10 ; -- ; -- ; 00:00:06 ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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+---------------------------------------------------------------------------------------+
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; Flow OS Summary ;
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+-------------------------+------------------+------------+------------+----------------+
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; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
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+-------------------------+------------------+------------+------------+----------------+
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; Analysis & Synthesis ; vaffanculo ; Windows XP ; 5.1 ; i686 ;
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; Fitter ; vaffanculo ; Windows XP ; 5.1 ; i686 ;
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; Assembler ; vaffanculo ; Windows XP ; 5.1 ; i686 ;
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; Classic Timing Analyzer ; vaffanculo ; Windows XP ; 5.1 ; i686 ;
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+-------------------------+------------------+------------+------------+----------------+
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------------
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; Flow Log ;
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------------
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quartus_map --read_settings_files=on --write_settings_files=off Open_JTAG -c Open_JTAG
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quartus_fit --read_settings_files=off --write_settings_files=off Open_JTAG -c Open_JTAG
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quartus_asm --read_settings_files=off --write_settings_files=off Open_JTAG -c Open_JTAG
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quartus_tan --read_settings_files=off --write_settings_files=off Open_JTAG -c Open_JTAG
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