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Line 30... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 94 $
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// $Rev: 134 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-02-24 21:33:35 +0100 (Thu, 24 Feb 2011) $
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// $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// CPU registers
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// CPU registers
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//======================
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//======================
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wire [15:0] irq_vect_02 = pmem_0.mem[(1<<(`PMEM_MSB+1))-14]; // IRQ 2
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wire [15:0] irq_vect_02 = pmem_0.mem[(1<<(`PMEM_MSB+1))-14]; // IRQ 2
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wire [15:0] irq_vect_01 = pmem_0.mem[(1<<(`PMEM_MSB+1))-15]; // IRQ 1
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wire [15:0] irq_vect_01 = pmem_0.mem[(1<<(`PMEM_MSB+1))-15]; // IRQ 1
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wire [15:0] irq_vect_00 = pmem_0.mem[(1<<(`PMEM_MSB+1))-16]; // IRQ 0
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wire [15:0] irq_vect_00 = pmem_0.mem[(1<<(`PMEM_MSB+1))-16]; // IRQ 0
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// Interrupt detection
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// Interrupt detection
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wire nmi_detect = dut.frontend_0.inst_nmi;
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wire nmi_detect = dut.frontend_0.nmi_pnd;
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wire irq_detect = dut.frontend_0.irq_detect;
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wire irq_detect = dut.frontend_0.irq_detect;
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// Debug interface
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wire dbg_clk = dut.clock_module_0.dbg_clk;
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wire dbg_rst = dut.clock_module_0.dbg_rst;
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// CPU ID
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//======================
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wire [2:0] dbg_cpu_version = `CPU_VERSION;
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`ifdef ASIC
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wire dbg_cpu_asic = 1'b1;
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`else
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wire dbg_cpu_asic = 1'b0;
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`endif
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wire [4:0] dbg_user_version = `USER_VERSION;
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wire [6:0] dbg_per_space = (`PER_SIZE >> 9);
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`ifdef MULTIPLIER
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wire dbg_mpy_info = 1'b1;
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`else
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wire dbg_mpy_info = 1'b0;
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`endif
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wire [8:0] dbg_dmem_size = (`DMEM_SIZE >> 7);
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wire [5:0] dbg_pmem_size = (`PMEM_SIZE >> 10);
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wire [31:0] dbg_cpu_id = {dbg_pmem_size,
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dbg_dmem_size,
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dbg_mpy_info,
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dbg_per_space,
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dbg_user_version,
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dbg_cpu_asic,
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dbg_cpu_version};
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No newline at end of file
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