| Line 29... |
Line 29... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 106 $
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// $Rev: 111 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-03-25 23:01:03 +0100 (Fri, 25 Mar 2011) $
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// $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`include "timescale.v"
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`include "timescale.v"
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`ifdef OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`else
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`else
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`include "openMSP430_defines.v"
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`include "openMSP430_defines.v"
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| Line 60... |
Line 60... |
wire [15:0] pmem_din;
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wire [15:0] pmem_din;
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wire [1:0] pmem_wen;
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wire [1:0] pmem_wen;
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wire [15:0] pmem_dout;
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wire [15:0] pmem_dout;
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|
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// Peripherals interface
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// Peripherals interface
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wire [7:0] per_addr;
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wire [13:0] per_addr;
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wire [15:0] per_din;
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wire [15:0] per_din;
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wire [15:0] per_dout;
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wire [15:0] per_dout;
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wire [1:0] per_we;
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wire [1:0] per_we;
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wire per_en;
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wire per_en;
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|
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| Line 125... |
Line 125... |
reg lfxt_clk;
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reg lfxt_clk;
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wire mclk;
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wire mclk;
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wire aclk_en;
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wire aclk_en;
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wire smclk_en;
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wire smclk_en;
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reg reset_n;
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reg reset_n;
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wire puc;
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wire puc_rst;
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reg nmi;
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reg nmi;
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reg [13:0] irq;
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reg [13:0] irq;
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wire [13:0] irq_acc;
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wire [13:0] irq_acc;
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wire [13:0] irq_in;
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wire [13:0] irq_in;
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reg cpu_en;
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reg cpu_en;
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| Line 285... |
Line 285... |
.per_en (per_en), // Peripheral enable (high active)
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.per_en (per_en), // Peripheral enable (high active)
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.pmem_addr (pmem_addr), // Program Memory address
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.pmem_addr (pmem_addr), // Program Memory address
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.pmem_cen (pmem_cen), // Program Memory chip enable (low active)
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.pmem_cen (pmem_cen), // Program Memory chip enable (low active)
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.pmem_din (pmem_din), // Program Memory data input (optional)
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.pmem_din (pmem_din), // Program Memory data input (optional)
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.pmem_wen (pmem_wen), // Program Memory write enable (low active) (optional)
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.pmem_wen (pmem_wen), // Program Memory write enable (low active) (optional)
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.puc (puc), // Main system reset
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.puc_rst (puc_rst), // Main system reset
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.smclk_en (smclk_en), // SMCLK enable
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.smclk_en (smclk_en), // SMCLK enable
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|
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// INPUTs
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// INPUTs
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.cpu_en (cpu_en), // Enable CPU code execution
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.cpu_en (cpu_en), // Enable CPU code execution
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.dbg_en (dbg_en), // Debug interface enable
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.dbg_en (dbg_en), // Debug interface enable
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| Line 357... |
Line 357... |
.p6_din (p6_din), // Port 6 data input
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.p6_din (p6_din), // Port 6 data input
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.per_addr (per_addr), // Peripheral address
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.per_addr (per_addr), // Peripheral address
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.per_din (per_din), // Peripheral data input
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.per_din (per_din), // Peripheral data input
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.per_en (per_en), // Peripheral enable (high active)
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.per_en (per_en), // Peripheral enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.puc (puc) // Main system reset
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.puc_rst (puc_rst) // Main system reset
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);
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);
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|
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//
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//
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// Timers
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// Timers
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//----------------------------------
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//----------------------------------
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| Line 387... |
Line 387... |
.mclk (mclk), // Main system clock
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.mclk (mclk), // Main system clock
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.per_addr (per_addr), // Peripheral address
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.per_addr (per_addr), // Peripheral address
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.per_din (per_din), // Peripheral data input
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.per_din (per_din), // Peripheral data input
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.per_en (per_en), // Peripheral enable (high active)
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.per_en (per_en), // Peripheral enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.puc (puc), // Main system reset
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.puc_rst (puc_rst), // Main system reset
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.smclk_en (smclk_en), // SMCLK enable (from CPU)
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.smclk_en (smclk_en), // SMCLK enable (from CPU)
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.ta_cci0a (ta_cci0a), // Timer A compare 0 input A
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.ta_cci0a (ta_cci0a), // Timer A compare 0 input A
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.ta_cci0b (ta_cci0b), // Timer A compare 0 input B
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.ta_cci0b (ta_cci0b), // Timer A compare 0 input B
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.ta_cci1a (ta_cci1a), // Timer A compare 1 input A
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.ta_cci1a (ta_cci1a), // Timer A compare 1 input A
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.ta_cci1b (ta_cci1b), // Timer A compare 1 input B
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.ta_cci1b (ta_cci1b), // Timer A compare 1 input B
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| Line 413... |
Line 413... |
.mclk (mclk), // Main system clock
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.mclk (mclk), // Main system clock
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.per_addr (per_addr), // Peripheral address
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.per_addr (per_addr), // Peripheral address
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.per_din (per_din), // Peripheral data input
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.per_din (per_din), // Peripheral data input
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.per_en (per_en), // Peripheral enable (high active)
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.per_en (per_en), // Peripheral enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.puc (puc) // Main system reset
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.puc_rst (puc_rst) // Main system reset
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);
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);
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|
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template_periph_16b template_periph_16b_0 (
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`ifdef CVER
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template_periph_16b #(15'h0190) template_periph_16b_0 (
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`else
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template_periph_16b #(.BASE_ADDR(15'd`PER_SIZE-15'h0070)) template_periph_16b_0 (
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`endif
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// OUTPUTs
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// OUTPUTs
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.per_dout (per_dout_temp_16b), // Peripheral data output
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.per_dout (per_dout_temp_16b), // Peripheral data output
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|
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// INPUTs
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// INPUTs
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.mclk (mclk), // Main system clock
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.mclk (mclk), // Main system clock
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.per_addr (per_addr), // Peripheral address
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.per_addr (per_addr), // Peripheral address
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.per_din (per_din), // Peripheral data input
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.per_din (per_din), // Peripheral data input
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.per_en (per_en), // Peripheral enable (high active)
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.per_en (per_en), // Peripheral enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.per_we (per_we), // Peripheral write enable (high active)
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.puc (puc) // Main system reset
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.puc_rst (puc_rst) // Main system reset
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);
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);
|
|
|
|
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//
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//
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// Combine peripheral data bus
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// Combine peripheral data bus
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| Line 477... |
Line 480... |
.inst_pc (inst_pc), // Instruction Program counter
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.inst_pc (inst_pc), // Instruction Program counter
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.inst_short (inst_short), // Currently executed instruction (short version)
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.inst_short (inst_short), // Currently executed instruction (short version)
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|
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// INPUTs
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// INPUTs
|
.mclk (mclk), // Main system clock
|
.mclk (mclk), // Main system clock
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.puc (puc) // Main system reset
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.puc_rst (puc_rst) // Main system reset
|
);
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);
|
|
|
|
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//
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//
|
// Generate Waveform
|
// Generate Waveform
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