URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [bench/] [verilog/] [tb_openMSP430.v] - Diff between revs 67 and 72

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Rev 67	Rev 72
Line 29...	Line 29...
`//`	`//`
`// *Author(s):`	`// *Author(s):`
`// - Olivier Girard, olgirard@gmail.com`	`// - Olivier Girard, olgirard@gmail.com`
`//`	`//`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`// $Rev: 67 $`	`// $Rev: 72 $`
`// $LastChangedBy: olivier.girard $`	`// $LastChangedBy: olivier.girard $`
`// $LastChangedDate: 2010-03-07 12:59:38 +0100 (Sun, 07 Mar 2010) $`	`// $LastChangedDate: 2010-08-01 20:54:37 +0200 (Sun, 01 Aug 2010) $`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`include "timescale.v"	`include "timescale.v"
`include "openMSP430_defines.v"	`include "openMSP430_defines.v"


Line 223...	Line 223...

`//`	`//`
`// Program Memory`	`// Program Memory`
`//----------------------------------`	`//----------------------------------`

ram #(`PMEM_MSB) pmem_0 (	ram #(`PMEM_MSB, `PMEM_SIZE) pmem_0 (

`// OUTPUTs`	`// OUTPUTs`
`.ram_dout (pmem_dout), // Program Memory data output`	`.ram_dout (pmem_dout), // Program Memory data output`

`// INPUTs`	`// INPUTs`
Line 241...	Line 241...

`//`	`//`
`// Data Memory`	`// Data Memory`
`//----------------------------------`	`//----------------------------------`

ram #(`DMEM_MSB) dmem_0 (	ram #(`DMEM_MSB, `DMEM_SIZE) dmem_0 (

`// OUTPUTs`	`// OUTPUTs`
`.ram_dout (dmem_dout), // Data Memory data output`	`.ram_dout (dmem_dout), // Data Memory data output`

`// INPUTs`	`// INPUTs`

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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [bench/] [verilog/] [tb_openMSP430.v] - Diff between revs 67 and 72