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Rev 74 |
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//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 53 $
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// $Rev: 74 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2010-01-27 19:17:14 +0100 (Wed, 27 Jan 2010) $
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// $LastChangedDate: 2010-08-28 21:53:08 +0200 (Sat, 28 Aug 2010) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`include "timescale.v"
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`include "timescale.v"
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`include "openMSP430_defines.v"
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`include "openMSP430_defines.v"
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module omsp_dbg (
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module omsp_dbg (
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//=============================================================================
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//=============================================================================
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// CPU_ID Register
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// CPU_ID Register
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//-----------------
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//-----------------
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wire [3:0] cpu_id_pmem = `PMEM_AWIDTH;
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wire [15:0] cpu_id_pmem = `PMEM_SIZE;
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wire [3:0] cpu_id_dmem = `DMEM_AWIDTH;
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wire [15:0] cpu_id_dmem = `DMEM_SIZE;
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wire [31:0] cpu_id = {`DBG_ID, cpu_id_pmem, cpu_id_dmem};
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wire [31:0] cpu_id = {cpu_id_pmem, cpu_id_dmem};
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// CPU_CTL Register
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// CPU_CTL Register
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// 7 6 5 4 3 2 1 0
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// 7 6 5 4 3 2 1 0
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