| Line 29... |
Line 29... |
//
|
//
|
// *Author(s):
|
// *Author(s):
|
// - Olivier Girard, olgirard@gmail.com
|
// - Olivier Girard, olgirard@gmail.com
|
//
|
//
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
// $Rev: 34 $
|
// $Rev: 74 $
|
// $LastChangedBy: olivier.girard $
|
// $LastChangedBy: olivier.girard $
|
// $LastChangedDate: 2009-12-29 20:10:34 +0100 (Tue, 29 Dec 2009) $
|
// $LastChangedDate: 2010-08-28 21:53:08 +0200 (Sat, 28 Aug 2010) $
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
`include "timescale.v"
|
`include "timescale.v"
|
`include "openMSP430_defines.v"
|
`include "openMSP430_defines.v"
|
|
|
module omsp_dbg_uart (
|
module omsp_dbg_uart (
|
| Line 180... |
Line 180... |
|
|
assign sync_done = (uart_state==RX_SYNC) & rxd_re & sync_busy;
|
assign sync_done = (uart_state==RX_SYNC) & rxd_re & sync_busy;
|
|
|
`ifdef DBG_UART_AUTO_SYNC
|
`ifdef DBG_UART_AUTO_SYNC
|
|
|
reg [14:0] sync_cnt;
|
reg [`DBG_UART_XFER_CNT_W+2:0] sync_cnt;
|
always @ (posedge mclk or posedge por)
|
always @ (posedge mclk or posedge por)
|
if (por) sync_cnt <= 15'h7ff8;
|
if (por) sync_cnt <= {{`DBG_UART_XFER_CNT_W{1'b1}}, 3'b000};
|
else if (sync_busy) sync_cnt <= sync_cnt+15'h0001;
|
else if (sync_busy) sync_cnt <= sync_cnt+{{`DBG_UART_XFER_CNT_W+2{1'b0}}, 1'b1};
|
|
|
wire [11:0] bit_cnt_max = sync_cnt[14:3];
|
wire [`DBG_UART_XFER_CNT_W-1:0] bit_cnt_max = sync_cnt[`DBG_UART_XFER_CNT_W+2:3];
|
`else
|
`else
|
wire [11:0] bit_cnt_max = `DBG_UART_CNT;
|
wire [`DBG_UART_XFER_CNT_W-1:0] bit_cnt_max = `DBG_UART_CNT;
|
`endif
|
`endif
|
|
|
|
|
//=============================================================================
|
//=============================================================================
|
// 4) UART RECEIVE / TRANSMIT
|
// 4) UART RECEIVE / TRANSMIT
|
//=============================================================================
|
//=============================================================================
|
|
|
// Transfer counter
|
// Transfer counter
|
//------------------------
|
//------------------------
|
reg [3:0] xfer_bit;
|
reg [3:0] xfer_bit;
|
reg [11:0] xfer_cnt;
|
reg [`DBG_UART_XFER_CNT_W-1:0] xfer_cnt;
|
|
|
wire txd_start = dbg_rd_rdy | (xfer_done & (uart_state==TX_DATA1));
|
wire txd_start = dbg_rd_rdy | (xfer_done & (uart_state==TX_DATA1));
|
wire rxd_start = (xfer_bit==4'h0) & rxd_fe & ((uart_state!=RX_SYNC));
|
wire rxd_start = (xfer_bit==4'h0) & rxd_fe & ((uart_state!=RX_SYNC));
|
wire xfer_bit_inc = (xfer_bit!=4'h0) & (xfer_cnt==12'h000);
|
wire xfer_bit_inc = (xfer_bit!=4'h0) & (xfer_cnt=={`DBG_UART_XFER_CNT_W{1'b0}});
|
assign xfer_done = (xfer_bit==4'hb);
|
assign xfer_done = (xfer_bit==4'hb);
|
|
|
always @ (posedge mclk or posedge por)
|
always @ (posedge mclk or posedge por)
|
if (por) xfer_bit <= 4'h0;
|
if (por) xfer_bit <= 4'h0;
|
else if (txd_start | rxd_start) xfer_bit <= 4'h1;
|
else if (txd_start | rxd_start) xfer_bit <= 4'h1;
|
else if (xfer_done) xfer_bit <= 4'h0;
|
else if (xfer_done) xfer_bit <= 4'h0;
|
else if (xfer_bit_inc) xfer_bit <= xfer_bit+4'h1;
|
else if (xfer_bit_inc) xfer_bit <= xfer_bit+4'h1;
|
|
|
always @ (posedge mclk or posedge por)
|
always @ (posedge mclk or posedge por)
|
if (por) xfer_cnt <= 12'h000;
|
if (por) xfer_cnt <= {`DBG_UART_XFER_CNT_W{1'b0}};
|
else if (rxd_start) xfer_cnt <= {1'b0, bit_cnt_max[11:1]};
|
else if (rxd_start) xfer_cnt <= {1'b0, bit_cnt_max[`DBG_UART_XFER_CNT_W-1:1]};
|
else if (txd_start | xfer_bit_inc) xfer_cnt <= bit_cnt_max;
|
else if (txd_start | xfer_bit_inc) xfer_cnt <= bit_cnt_max;
|
else xfer_cnt <= xfer_cnt+12'hfff;
|
else xfer_cnt <= xfer_cnt+{`DBG_UART_XFER_CNT_W{1'b1}};
|
|
|
|
|
// Receive/Transmit buffer
|
// Receive/Transmit buffer
|
//-------------------------
|
//-------------------------
|
wire [19:0] xfer_buf_nxt = {rxd_s, xfer_buf[19:1]};
|
wire [19:0] xfer_buf_nxt = {rxd_s, xfer_buf[19:1]};
|
