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[/] [openmsp430/] [trunk/] [core/] [rtl/] [verilog/] [openMSP430.v] - Diff between revs 175 and 192

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Rev 175 Rev 192
Line 34... Line 34...
//
//
// *Author(s):
// *Author(s):
//              - Olivier Girard,    olgirard@gmail.com
//              - Olivier Girard,    olgirard@gmail.com
//
//
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// $Rev: 175 $
// $Rev: 192 $
// $LastChangedBy: olivier.girard $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2013-01-30 22:21:42 +0100 (Wed, 30 Jan 2013) $
// $LastChangedDate: 2013-12-17 21:15:28 +0100 (Tue, 17 Dec 2013) $
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
`ifdef OMSP_NO_INCLUDE
`ifdef OMSP_NO_INCLUDE
`else
`else
`include "openMSP430_defines.v"
`include "openMSP430_defines.v"
`endif
`endif
Line 112... Line 112...
output               dco_wkup;          // ASIC ONLY: Fast oscillator wake-up (asynchronous)
output               dco_wkup;          // ASIC ONLY: Fast oscillator wake-up (asynchronous)
output [`DMEM_MSB:0] dmem_addr;         // Data Memory address
output [`DMEM_MSB:0] dmem_addr;         // Data Memory address
output               dmem_cen;          // Data Memory chip enable (low active)
output               dmem_cen;          // Data Memory chip enable (low active)
output        [15:0] dmem_din;          // Data Memory data input
output        [15:0] dmem_din;          // Data Memory data input
output         [1:0] dmem_wen;          // Data Memory write enable (low active)
output         [1:0] dmem_wen;          // Data Memory write enable (low active)
output        [13:0] irq_acc;           // Interrupt request accepted (one-hot signal)
output [`IRQ_NR-3:0] irq_acc;           // Interrupt request accepted (one-hot signal)
output               lfxt_enable;       // ASIC ONLY: Low frequency oscillator enable
output               lfxt_enable;       // ASIC ONLY: Low frequency oscillator enable
output               lfxt_wkup;         // ASIC ONLY: Low frequency oscillator wake-up (asynchronous)
output               lfxt_wkup;         // ASIC ONLY: Low frequency oscillator wake-up (asynchronous)
output               mclk;              // Main system clock
output               mclk;              // Main system clock
output        [13:0] per_addr;          // Peripheral address
output        [13:0] per_addr;          // Peripheral address
output        [15:0] per_din;           // Peripheral data input
output        [15:0] per_din;           // Peripheral data input
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input                dbg_i2c_scl;       // Debug interface: I2C SCL
input                dbg_i2c_scl;       // Debug interface: I2C SCL
input                dbg_i2c_sda_in;    // Debug interface: I2C SDA IN
input                dbg_i2c_sda_in;    // Debug interface: I2C SDA IN
input                dbg_uart_rxd;      // Debug interface: UART RXD (asynchronous)
input                dbg_uart_rxd;      // Debug interface: UART RXD (asynchronous)
input                dco_clk;           // Fast oscillator (fast clock)
input                dco_clk;           // Fast oscillator (fast clock)
input         [15:0] dmem_dout;         // Data Memory data output
input         [15:0] dmem_dout;         // Data Memory data output
input         [13:0] irq;               // Maskable interrupts
input  [`IRQ_NR-3:0] irq;               // Maskable interrupts (14, 30 or 62)
input                lfxt_clk;          // Low frequency oscillator (typ 32kHz)
input                lfxt_clk;          // Low frequency oscillator (typ 32kHz)
input                nmi;               // Non-maskable interrupt (asynchronous and non-glitchy)
input                nmi;               // Non-maskable interrupt (asynchronous and non-glitchy)
input         [15:0] per_dout;          // Peripheral data output
input         [15:0] per_dout;          // Peripheral data output
input         [15:0] pmem_dout;         // Program Memory data output
input         [15:0] pmem_dout;         // Program Memory data output
input                reset_n;           // Reset Pin (active low, asynchronous and non-glitchy)
input                reset_n;           // Reset Pin (active low, asynchronous and non-glitchy)
Line 492... Line 492...
    .scan_enable    (scan_enable),   // Scan enable (active during scan shifting)
    .scan_enable    (scan_enable),   // Scan enable (active during scan shifting)
    .scan_mode      (scan_mode),     // Scan mode
    .scan_mode      (scan_mode),     // Scan mode
    .smclk          (smclk),         // SMCLK
    .smclk          (smclk),         // SMCLK
    .smclk_en       (smclk_en),      // SMCLK enable
    .smclk_en       (smclk_en),      // SMCLK enable
    .wdtie          (wdtie),         // Watchdog-timer interrupt enable
    .wdtie          (wdtie),         // Watchdog-timer interrupt enable
    .wdtifg_irq_clr (irq_acc[10]),   // Clear Watchdog-timer interrupt flag
    .wdtifg_irq_clr (irq_acc[`IRQ_NR-6]), // Clear Watchdog-timer interrupt flag
    .wdtifg_sw_clr  (wdtifg_sw_clr), // Watchdog-timer interrupt flag software clear
    .wdtifg_sw_clr  (wdtifg_sw_clr), // Watchdog-timer interrupt flag software clear
    .wdtifg_sw_set  (wdtifg_sw_set)  // Watchdog-timer interrupt flag software set
    .wdtifg_sw_set  (wdtifg_sw_set)  // Watchdog-timer interrupt flag software set
);
);
`else
`else
assign per_dout_wdog = 16'h0000;
assign per_dout_wdog = 16'h0000;

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