Line 29... |
Line 29... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 106 $
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// $Rev: 111 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-03-25 23:01:03 +0100 (Fri, 25 Mar 2011) $
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// $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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//`define OMSP_NO_INCLUDE
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//`define OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`else
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`else
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`include "openMSP430_undefines.v"
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`include "openMSP430_undefines.v"
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`endif
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`endif
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//----------------------------------------------------------------------------
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//============================================================================
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// SYSTEM CONFIGURATION
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//============================================================================
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//----------------------------------------------------------------------------
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// BASIC SYSTEM CONFIGURATION
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//============================================================================
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//============================================================================
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//
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//
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// Note: the sum of both program and data memories should not exceed 63.5 kB
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// Note: the sum of program, data and peripheral memory spaces must not
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// exceed 64 kB
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//
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//
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// Program Memory Size:
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// Program Memory Size:
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// Uncomment the required memory size
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// Uncomment the required memory size
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//-------------------------------------------------------
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//-------------------------------------------------------
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Line 64... |
Line 67... |
//`define PMEM_SIZE_8_KB
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//`define PMEM_SIZE_8_KB
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//`define PMEM_SIZE_4_KB
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//`define PMEM_SIZE_4_KB
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`define PMEM_SIZE_2_KB
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`define PMEM_SIZE_2_KB
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//`define PMEM_SIZE_1_KB
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//`define PMEM_SIZE_1_KB
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// Data Memory Size:
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// Data Memory Size:
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// Uncomment the required memory size
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// Uncomment the required memory size
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//-------------------------------------------------------
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//-------------------------------------------------------
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//`define DMEM_SIZE_32_KB
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//`define DMEM_SIZE_32_KB
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//`define DMEM_SIZE_24_KB
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//`define DMEM_SIZE_24_KB
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Line 86... |
Line 90... |
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// Include/Exclude Hardware Multiplier
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// Include/Exclude Hardware Multiplier
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`define MULTIPLIER
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`define MULTIPLIER
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//----------------------------------------------------------------------------
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// Include/Exclude Serial Debug interface
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// REMOTE DEBUGGING INTERFACE CONFIGURATION
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//----------------------------------------------------------------------------
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// Include Debug interface
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`define DBG_EN
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`define DBG_EN
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// Debug interface selection
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// `define DBG_UART -> Enable UART (8N1) debug interface
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//============================================================================
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// `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
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//============================================================================
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// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)
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//============================================================================
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//============================================================================
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//-------------------------------------------------------
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// Peripheral Memory Space:
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//-------------------------------------------------------
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// The original MSP430 architecture map the peripherals
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// from 0x0000 to 0x01FF (i.e. 512B of the memory space).
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// The following defines allow you to expand this space
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// up to 32 kB (i.e. from 0x0000 to 0x7fff).
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// As a consequence, the data memory mapping will be
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// shifted up and a custom linker script will therefore
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// be required by the GCC compiler.
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//-------------------------------------------------------
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//`define PER_SIZE_32_KB
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//`define PER_SIZE_16_KB
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//`define PER_SIZE_8_KB
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//`define PER_SIZE_4_KB
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//`define PER_SIZE_2_KB
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//`define PER_SIZE_1_KB
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`define PER_SIZE_512_B
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//-------------------------------------------------------
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// Defines the debugger CPU_CTL.RST_BRK_EN reset value
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// (CPU break on PUC reset)
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//-------------------------------------------------------
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// When defined, the CPU will automatically break after
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// a PUC occurrence by default. This is typically usefull
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// when the program memory can only be initialized through
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// the serial debug interface.
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//-------------------------------------------------------
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//`define DBG_RST_BRK_EN
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//-------------------------------------------------------
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// Custom user version number
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//-------------------------------------------------------
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// This 5 bit field can be freely used in order to allow
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// custom identification of the system where the openMSP430
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// is included through the debug interface.
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// (see CPU_ID.USER_VERSION field in the documentation)
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//-------------------------------------------------------
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`define USER_VERSION 5'b00000
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//============================================================================
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//============================================================================
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// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )
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//============================================================================
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//============================================================================
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//
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//
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`define DBG_UART
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// IMPORTANT NOTE: Please update following configuration options ONLY if
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//`define DBG_JTAG
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// you have a good reason to do so... and if you know what
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// you are doing :-P
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//
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//============================================================================
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// Number of hardware breakpoints (each unit contains 2 hw address breakpoints)
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//-------------------------------------------------------
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// `define DBG_HWBRK_0 -> Include hardware breakpoints unit 0
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// Number of hardware breakpoint units (each unit contains
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// `define DBG_HWBRK_1 -> Include hardware breakpoints unit 1
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// two hardware address breakpoints):
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// `define DBG_HWBRK_2 -> Include hardware breakpoints unit 2
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// - DBG_HWBRK_0 -> Include hardware breakpoints unit 0
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// `define DBG_HWBRK_3 -> Include hardware breakpoints unit 3
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// - DBG_HWBRK_1 -> Include hardware breakpoints unit 1
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//
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// - DBG_HWBRK_2 -> Include hardware breakpoints unit 2
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`define DBG_HWBRK_0
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// - DBG_HWBRK_3 -> Include hardware breakpoints unit 3
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`define DBG_HWBRK_1
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//-------------------------------------------------------
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`define DBG_HWBRK_2
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// Please keep in mind that hardware breakpoints only
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`define DBG_HWBRK_3
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// make sense whenever the program memory is not an SRAM
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// (i.e. Flash/OTP/ROM/...) or when you are interested
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// Defines the debugger CPU_CTL.RST_BRK_EN reset value (CPU break on PUC reset)
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// in data breakpoints (btw. not supported by GDB).
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//
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//-------------------------------------------------------
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// When defined, this concretely bring the CPU to break after a PUC
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//`define DBG_HWBRK_0
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// occurrence by default. This is typically usefull when the program
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//`define DBG_HWBRK_1
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// memory can only be initialized through the serial debug interface.
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//`define DBG_HWBRK_2
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//`define DBG_HWBRK_3
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//-------------------------------------------------------
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// Enable/Disable the hardware breakpoint RANGE mode
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//-------------------------------------------------------
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// When enabled this feature allows the hardware breakpoint
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// units to stop the cpu whenever an instruction or data
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// access lays within an address range.
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// Note that this feature is not supported by GDB.
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//-------------------------------------------------------
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//`define DBG_HWBRK_RANGE
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//-------------------------------------------------------
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// Input synchronizers
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//-------------------------------------------------------
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// In some cases, the asynchronous input ports might
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// already be synchronized externally.
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// If an extensive CDC design review showed that this
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// is really the case, the individual synchronizers
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// can be disabled with the following defines.
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//
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// Notes:
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// - the dbg_en signal will reset the debug interface
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// when 0. Therefore make sure it is glitch free.
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//
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//
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//`define DBG_RST_BRK_EN
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// - the dbg_uart_rxd synchronizer must be set to 1
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// when its reset is active.
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//-------------------------------------------------------
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`define SYNC_CPU_EN
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`define SYNC_DBG_EN
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`define SYNC_DBG_UART_RXD
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`define SYNC_NMI
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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Line 131... |
Line 219... |
//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//
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//
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// PROGRAM & DATA MEMORY CONFIGURATION
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// PROGRAM, DATA & PERIPHERAL MEMORY CONFIGURATION
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//======================================
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//==================================================
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// Program Memory Size
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// Program Memory Size
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`ifdef PMEM_SIZE_59_KB
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`ifdef PMEM_SIZE_59_KB
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`define PMEM_AWIDTH 15
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`define PMEM_AWIDTH 15
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`define PMEM_SIZE 60416
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`define PMEM_SIZE 60416
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Line 246... |
Line 334... |
`ifdef DMEM_SIZE_128_B
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`ifdef DMEM_SIZE_128_B
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`define DMEM_AWIDTH 6
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`define DMEM_AWIDTH 6
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`define DMEM_SIZE 128
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`define DMEM_SIZE 128
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`endif
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`endif
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// Peripheral Memory Size
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`ifdef PER_SIZE_32_KB
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`define PER_AWIDTH 14
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`define PER_SIZE 32768
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`endif
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`ifdef PER_SIZE_16_KB
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`define PER_AWIDTH 13
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`define PER_SIZE 16384
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`endif
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`ifdef PER_SIZE_8_KB
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`define PER_AWIDTH 12
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`define PER_SIZE 8192
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`endif
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`ifdef PER_SIZE_4_KB
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`define PER_AWIDTH 11
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`define PER_SIZE 4096
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`endif
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`ifdef PER_SIZE_2_KB
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`define PER_AWIDTH 10
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`define PER_SIZE 2048
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`endif
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`ifdef PER_SIZE_1_KB
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`define PER_AWIDTH 9
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`define PER_SIZE 1024
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`endif
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`ifdef PER_SIZE_512_B
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`define PER_AWIDTH 8
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`define PER_SIZE 512
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`endif
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|
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// Data Memory Base Adresses
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// Data Memory Base Adresses
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`define DMEM_BASE 16'h0200
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`define DMEM_BASE `PER_SIZE
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// Program & Data Memory most significant address bit (for 16 bit words)
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// Program & Data Memory most significant address bit (for 16 bit words)
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`define PMEM_MSB `PMEM_AWIDTH-1
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`define PMEM_MSB `PMEM_AWIDTH-1
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`define DMEM_MSB `DMEM_AWIDTH-1
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`define DMEM_MSB `DMEM_AWIDTH-1
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`define PER_MSB `PER_AWIDTH-1
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//
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//
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// STATES, REGISTER FIELDS, ...
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// STATES, REGISTER FIELDS, ...
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//======================================
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//======================================
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|
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Line 306... |
Line 425... |
`define SYMB 4
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`define SYMB 4
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`define IMM 5
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`define IMM 5
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`define ABS 6
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`define ABS 6
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`define CONST 7
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`define CONST 7
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|
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// Instruction state machine
|
|
`define I_IRQ_FETCH 3'h0
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`define I_IRQ_DONE 3'h1
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`define I_DEC 3'h2
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`define I_EXT1 3'h3
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`define I_EXT2 3'h4
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`define I_IDLE 3'h5
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// Execution state machine
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// Execution state machine
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`define E_IRQ_0 4'h0
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`define E_IRQ_0 4'h0
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`define E_IRQ_1 4'h1
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`define E_IRQ_1 4'h1
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`define E_IRQ_2 4'h2
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`define E_IRQ_2 4'h2
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`define E_IRQ_3 4'h3
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`define E_IRQ_3 4'h3
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Line 377... |
Line 504... |
|
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//
|
//
|
// DEBUG INTERFACE EXTRA CONFIGURATION
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// DEBUG INTERFACE EXTRA CONFIGURATION
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//======================================
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//======================================
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|
|
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// Debug interface: CPU version
|
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`define CPU_VERSION 3'h1
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|
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// Debug interface: Software breakpoint opcode
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// Debug interface: Software breakpoint opcode
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`define DBG_SWBRK_OP 16'h4343
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`define DBG_SWBRK_OP 16'h4343
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|
|
// Debug UART interface auto data synchronization
|
// Debug UART interface auto data synchronization
|
// If the following define is commented out, then
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// If the following define is commented out, then
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Line 404... |
Line 534... |
//`define DBG_UART_BAUD 921600
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//`define DBG_UART_BAUD 921600
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`define DBG_UART_BAUD 2000000
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`define DBG_UART_BAUD 2000000
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`define DBG_DCO_FREQ 20000000
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`define DBG_DCO_FREQ 20000000
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`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
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`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
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|
|
|
// Debug interface selection
|
|
// `define DBG_UART -> Enable UART (8N1) debug interface
|
|
// `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
|
|
//
|
|
`define DBG_UART
|
|
//`define DBG_JTAG
|
|
|
// Enable/Disable the hardware breakpoint RANGE mode
|
// Enable/Disable the hardware breakpoint RANGE mode
|
|
`ifdef DBG_HWBRK_RANGE
|
|
`define HWBRK_RANGE 1'b1
|
|
`else
|
`define HWBRK_RANGE 1'b0
|
`define HWBRK_RANGE 1'b0
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`endif
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|
|
// Counter width for the debug interface UART
|
// Counter width for the debug interface UART
|
`define DBG_UART_XFER_CNT_W 16
|
`define DBG_UART_XFER_CNT_W 16
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|
|
// Check configuration
|
// Check configuration
|