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`ifdef OPENMSP430_DEFINES
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`else
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`define OPENMSP430_DEFINES
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// Copyright (C) 2001 Authors
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// Copyright (C) 2001 Authors
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//
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//
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// This source file may be used and distributed without restriction provided
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// This source file may be used and distributed without restriction provided
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// that this copyright statement is not removed from the file and that any
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// that this copyright statement is not removed from the file and that any
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//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 23 $
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// $Rev: 33 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
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// $LastChangedDate: 2009-12-29 19:18:00 +0100 (Tue, 29 Dec 2009) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`include "openMSP430_undefines.v"
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// SYSTEM CONFIGURATION
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// SYSTEM CONFIGURATION
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// ROM Size:
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// Program Memory Size:
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// 9 -> 1kB
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// 9 -> 1kB
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// 10 -> 2kB
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// 10 -> 2kB
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// 11 -> 4kB
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// 11 -> 4kB
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// 12 -> 8kB
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// 12 -> 8kB
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// 13 -> 16kB
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// 13 -> 16kB
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`define ROM_AWIDTH 10
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// 14 -> 32 kB
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`define PMEM_AWIDTH 10
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// RAM Size:
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// Data Memory Size:
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// 6 -> 128 B
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// 6 -> 128 B
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// 7 -> 256 B
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// 7 -> 256 B
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// 8 -> 512 B
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// 8 -> 512 B
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// 9 -> 1 kB
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// 9 -> 1 kB
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// 10 -> 2 kB
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// 10 -> 2 kB
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`define RAM_AWIDTH 6
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// 11 -> 4 kB
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// 12 -> 8 kB
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// 13 -> 16 kB
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// 14 -> 32 kB
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`define DMEM_AWIDTH 6
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// REMOTE DEBUGGING INTERFACE CONFIGURATION
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// REMOTE DEBUGGING INTERFACE CONFIGURATION
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// Include Debug interface
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// Include Debug interface
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`define DBG_EN
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`define DBG_EN
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// Debug interface selection
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// Debug interface selection
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// `define DBG_UART -> Enable UART (8N1) debug interface
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// `define DBG_UART -> Enable UART (8N1) debug interface
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// `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED YET
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// `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
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//
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//
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`define DBG_UART
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`define DBG_UART
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//`define DBG_JTAG
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//`define DBG_JTAG
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// Number of hardware breakpoints (each unit contains 2 hw address breakpoints)
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// Number of hardware breakpoints (each unit contains 2 hw address breakpoints)
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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// ROM and RAM sizes
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// Program and Data Memory sizes
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`define ROM_SIZE (2 << `ROM_AWIDTH)
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`define PMEM_SIZE (2 << `PMEM_AWIDTH)
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`define RAM_SIZE (2 << `RAM_AWIDTH)
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`define DMEM_SIZE (2 << `DMEM_AWIDTH)
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// RAM Base Adresses
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// Data Memory Base Adresses
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`define RAM_BASE 16'h0200 // RAM base address
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`define DMEM_BASE 16'h0200
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// ROM & RAM most significant address bit (for 16 bit words)
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// Program & Data Memory most significant address bit (for 16 bit words)
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`define ROM_MSB `ROM_AWIDTH-1
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`define PMEM_MSB `PMEM_AWIDTH-1
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`define RAM_MSB `RAM_AWIDTH-1
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`define DMEM_MSB `DMEM_AWIDTH-1
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// Instructions type
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// Instructions type
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`define INST_SO 0
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`define INST_SO 0
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`define INST_JMP 1
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`define INST_JMP 1
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`ifdef DBG_JTAG
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`ifdef DBG_JTAG
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CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
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CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
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`endif
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`endif
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`else
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`else
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`ifdef DBG_JTAG
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`ifdef DBG_JTAG
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CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED YET
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CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED
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`else
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`else
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CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
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CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
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`endif
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`endif
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`endif
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`endif
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`endif
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`endif
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`endif
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