| Line 34... |
Line 34... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 117 $
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// $Rev: 134 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-06-23 21:30:51 +0200 (Thu, 23 Jun 2011) $
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// $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`ifdef OMSP_TA_NO_INCLUDE
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`ifdef OMSP_TA_NO_INCLUDE
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`else
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`else
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`include "omsp_timerA_defines.v"
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`include "omsp_timerA_defines.v"
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`endif
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`endif
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| Line 133... |
Line 133... |
TACCTL2 = 'h66,
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TACCTL2 = 'h66,
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TACCR2 = 'h76,
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TACCR2 = 'h76,
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TAIV = 'h2E;
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TAIV = 'h2E;
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|
|
// Register one-hot decoder utilities
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// Register one-hot decoder utilities
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parameter DEC_SZ = 2**DEC_WD;
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parameter DEC_SZ = (1 << DEC_WD);
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parameter [DEC_SZ-1:0] BASE_REG = {{DEC_SZ-1{1'b0}}, 1'b1};
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parameter [DEC_SZ-1:0] BASE_REG = {{DEC_SZ-1{1'b0}}, 1'b1};
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|
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// Register one-hot decoder
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// Register one-hot decoder
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parameter [DEC_SZ-1:0] TACTL_D = (BASE_REG << TACTL),
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parameter [DEC_SZ-1:0] TACTL_D = (BASE_REG << TACTL),
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TAR_D = (BASE_REG << TAR),
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TAR_D = (BASE_REG << TAR),
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| Line 363... |
Line 363... |
wire taclk_s;
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wire taclk_s;
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wire inclk_s;
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wire inclk_s;
|
|
|
omsp_sync_cell sync_cell_taclk (
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omsp_sync_cell sync_cell_taclk (
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.data_out (taclk_s),
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.data_out (taclk_s),
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.clk (mclk),
|
|
.data_in (taclk),
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.data_in (taclk),
|
|
.clk (mclk),
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.rst (puc_rst)
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.rst (puc_rst)
|
);
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);
|
|
|
omsp_sync_cell sync_cell_inclk (
|
omsp_sync_cell sync_cell_inclk (
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.data_out (inclk_s),
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.data_out (inclk_s),
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.clk (mclk),
|
|
.data_in (inclk),
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.data_in (inclk),
|
|
.clk (mclk),
|
.rst (puc_rst)
|
.rst (puc_rst)
|
);
|
);
|
|
|
|
|
// Clock edge detection (TACLK & INCLK)
|
// Clock edge detection (TACLK & INCLK)
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| Line 477... |
Line 477... |
wire cci1_s;
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wire cci1_s;
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wire cci2_s;
|
wire cci2_s;
|
|
|
omsp_sync_cell sync_cell_cci0 (
|
omsp_sync_cell sync_cell_cci0 (
|
.data_out (cci0_s),
|
.data_out (cci0_s),
|
.clk (mclk),
|
|
.data_in (cci0),
|
.data_in (cci0),
|
|
.clk (mclk),
|
.rst (puc_rst)
|
.rst (puc_rst)
|
);
|
);
|
omsp_sync_cell sync_cell_cci1 (
|
omsp_sync_cell sync_cell_cci1 (
|
.data_out (cci1_s),
|
.data_out (cci1_s),
|
.clk (mclk),
|
|
.data_in (cci1),
|
.data_in (cci1),
|
|
.clk (mclk),
|
.rst (puc_rst)
|
.rst (puc_rst)
|
);
|
);
|
omsp_sync_cell sync_cell_cci2 (
|
omsp_sync_cell sync_cell_cci2 (
|
.data_out (cci2_s),
|
.data_out (cci2_s),
|
.clk (mclk),
|
|
.data_in (cci2),
|
.data_in (cci2),
|
|
.clk (mclk),
|
.rst (puc_rst)
|
.rst (puc_rst)
|
);
|
);
|
|
|
// Register CCIx for edge detection
|
// Register CCIx for edge detection
|
reg cci0_dly;
|
reg cci0_dly;
|
