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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [bin/] [msp430sim] - Diff between revs 122 and 134

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Rev 122 Rev 134
Line 27... Line 27...
#
#
# Author(s):
# Author(s):
#             - Olivier Girard,    olgirard@gmail.com
#             - Olivier Girard,    olgirard@gmail.com
#
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# $Rev: 122 $
# $Rev: 134 $
# $LastChangedBy: olivier.girard $
# $LastChangedBy: olivier.girard $
# $LastChangedDate: 2011-10-05 22:29:45 +0200 (Wed, 05 Oct 2011) $
# $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
 
 
###############################################################################
###############################################################################
#                            Parameter Check                                  #
#                            Parameter Check                                  #
###############################################################################
###############################################################################
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#                     Check if the required files exist                       #
#                     Check if the required files exist                       #
###############################################################################
###############################################################################
asmfile=../src/$1.s43;
asmfile=../src/$1.s43;
verfile=../src/$1.v;
verfile=../src/$1.v;
incfile=../../../rtl/verilog/openMSP430_defines.v;
incfile=../../../rtl/verilog/openMSP430_defines.v;
deffile=../bin/template.def;
linkfile=../bin/template.x;
submitfile=../src/submit.f;
submitfile=../src/submit.f;
if [ $OMSP_SIMULATOR == "isim" ]; then
if [ $OMSP_SIMULATOR == "isim" ]; then
    submitfile=../src/submit.prj;
    submitfile=../src/submit.prj;
fi
fi
 
 
Line 80... Line 80...
fi
fi
if [ ! -e $submitfile ]; then
if [ ! -e $submitfile ]; then
    echo "Verilog submit file $submitfile doesn't exist: $submitfile"
    echo "Verilog submit file $submitfile doesn't exist: $submitfile"
    exit 1
    exit 1
fi
fi
if [ ! -e $deffile ]; then
if [ ! -e $linkfile ]; then
    echo "Linker definition file template doesn't exist: $deffile"
    echo "Linker definition file template doesn't exist: $linkfile"
    exit 1
    exit 1
fi
fi
 
 
 
 
###############################################################################
###############################################################################
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    persize=`echo "persize=$persize * 1024; persize /= 1; persize" | bc`
    persize=`echo "persize=$persize * 1024; persize /= 1; persize" | bc`
fi
fi
 
 
# Compile assembler code
# Compile assembler code
echo "Compile, link & generate IHEX file (Program Memory: $pmemsize B, Data Memory: $dmemsize B, Peripheral Space: $persize B)..."
echo "Compile, link & generate IHEX file (Program Memory: $pmemsize B, Data Memory: $dmemsize B, Peripheral Space: $persize B)..."
../bin/asm2ihex.sh  pmem pmem.s43 $deffile $pmemsize $dmemsize $persize
../bin/asm2ihex.sh  pmem pmem.s43 $linkfile $pmemsize $dmemsize $persize
 
 
# Generate Program memory file
# Generate Program memory file
echo "Convert IHEX file to Verilog MEMH format..."
echo "Convert IHEX file to Verilog MEMH format..."
../bin/ihex2mem.tcl -ihex pmem.ihex -out pmem.mem -mem_size $pmemsize
../bin/ihex2mem.tcl -ihex pmem.ihex -out pmem.mem -mem_size $pmemsize
 
 

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