| Line 28... |
Line 28... |
# Author(s):
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# Author(s):
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# - Olivier Girard, olgirard@gmail.com
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# - Olivier Girard, olgirard@gmail.com
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# - Mihai M., mmihai@delajii.net
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# - Mihai M., mmihai@delajii.net
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#
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#
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# $Rev: 99 $
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# $Rev: 122 $
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# $LastChangedBy: olivier.girard $
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# $LastChangedBy: olivier.girard $
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# $LastChangedDate: 2011-02-28 21:26:17 +0100 (Mon, 28 Feb 2011) $
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# $LastChangedDate: 2011-10-05 22:29:45 +0200 (Wed, 05 Oct 2011) $
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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|
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###############################################################################
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###############################################################################
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# Parameter Check #
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# Parameter Check #
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###############################################################################
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###############################################################################
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EXPECTED_ARGS=3
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EXPECTED_ARGS=3
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if [ $# -ne $EXPECTED_ARGS ]; then
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if [ $# -ne $EXPECTED_ARGS ]; then
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echo "ERROR : wrong number of arguments"
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echo "ERROR : wrong number of arguments"
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echo "USAGE : rtlsim.sh <verilog stimulus file> <memory file> <submit file>"
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echo "USAGE : rtlsim.sh <verilog stimulus file> <memory file> <submit file>"
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echo "Example : rtlsim.sh ./stimulus.v pmem.mem ../src/submit.f"
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echo "Example : rtlsim.sh ./stimulus.v pmem.mem ../src/submit.f"
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echo "MYVLOG env keeps simulator name iverilog/cver/verilog/ncverilog/vsim/vcs"
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echo "OMSP_SIMULATOR env keeps simulator name iverilog/cver/verilog/ncverilog/vsim/vcs"
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exit 1
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exit 1
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fi
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fi
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###############################################################################
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###############################################################################
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| Line 68... |
Line 68... |
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###############################################################################
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###############################################################################
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# Start verilog simulation #
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# Start verilog simulation #
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###############################################################################
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###############################################################################
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|
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if [ "${MYVLOG:-iverilog}" = iverilog ]; then
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if [ "${OMSP_SIMULATOR:-iverilog}" = iverilog ]; then
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|
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rm -rf simv
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rm -rf simv
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|
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NODUMP=${OMSP_NODUMP-0}
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NODUMP=${OMSP_NODUMP-0}
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if [ $NODUMP -eq 1 ]
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if [ $NODUMP -eq 1 ]
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| Line 90... |
Line 90... |
vargs="+define+NODUMP"
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vargs="+define+NODUMP"
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else
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else
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vargs=""
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vargs=""
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fi
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fi
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|
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case $MYVLOG in
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case $OMSP_SIMULATOR in
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cver* )
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cver* )
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vargs="$vargs +define+VXL +define+CVER" ;;
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vargs="$vargs +define+VXL +define+CVER" ;;
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verilog* )
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verilog* )
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vargs="$vargs +define+VXL" ;;
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vargs="$vargs +define+VXL" ;;
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ncverilog* )
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ncverilog* )
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rm -rf INCA_libs
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rm -rf INCA_libs
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vargs="$vargs +access+r +define+TRN_FILE" ;;
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vargs="$vargs +access+r +ncinput+../bin/cov_ncverilog.tcl -covfile ../bin/cov_ncverilog.ccf -coverage all +define+TRN_FILE" ;;
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vcs* )
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vcs* )
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rm -rf csrc simv*
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rm -rf csrc simv*
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vargs="$vargs -R -debug_pp +vcs+lic+wait +v2k +define+VPD_FILE" ;;
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vargs="$vargs -R -debug_pp +vcs+lic+wait +v2k +define+VPD_FILE" ;;
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vsim )
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vsim* )
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# Modelsim
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# Modelsim
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if [ -d work ]; then vdel -all; fi
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if [ -d work ]; then vdel -all; fi
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vlib work
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vlib work
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exec vlog +acc=prn -f $3 $vargs -R -c -do "run -all"
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exec vlog +acc=prn -f $3 $vargs -R -c -do "run -all" ;;
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isim )
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# Xilinx simulator
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rm -rf fuse* isim*
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fuse tb_openMSP430 -prj $3 -o isim.exe -i ../../../bench/verilog/ -i ../../../rtl/verilog/ -i ../../../rtl/verilog/periph/
|
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echo "run all" > isim.tcl
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./isim.exe -tclbatch isim.tcl
|
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exit
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esac
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esac
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|
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echo "Running: $MYVLOG -f $3 $vargs"
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echo "Running: $OMSP_SIMULATOR -f $3 $vargs"
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exec $MYVLOG -f $3 $vargs
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exec $OMSP_SIMULATOR -f $3 $vargs
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fi
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fi
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No newline at end of file
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No newline at end of file
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