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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [clock_module_asic_lfxt.v] - Diff between revs 200 and 202

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Rev 200 Rev 202
Line 110... Line 110...
      if (lfxt_clk_counter !==  40)        tb_error("====== CLOCK GENERATOR: TEST 8 =====");
      if (lfxt_clk_counter !==  40)        tb_error("====== CLOCK GENERATOR: TEST 8 =====");
      if (r10              !==  16'h5678)  tb_error("====== CLOCK GENERATOR: TEST 9 =====");
      if (r10              !==  16'h5678)  tb_error("====== CLOCK GENERATOR: TEST 9 =====");
 
 
 
 
     `else
     `else
      $display(" ===============================================");
      tb_skip_finish("|   (this test requires the MCLK clock mux)     |");
      $display("|               SIMULATION SKIPPED              |");
 
      $display("|   (this test requires the MCLK clock mux)     |");
 
      $display(" ===============================================");
 
      $finish;
 
     `endif
     `endif
  `else
  `else
      $display(" ===============================================");
      tb_skip_finish("|   (this test requires the OSCOFF option)      |");
      $display("|               SIMULATION SKIPPED              |");
 
      $display("|   (this test requires the OSCOFF option)      |");
 
      $display(" ===============================================");
 
      $finish;
 
  `endif
  `endif
`else
`else
      $display(" ===============================================");
      tb_skip_finish("|   (this test is not supported in FPGA mode)   |");
      $display("|               SIMULATION SKIPPED              |");
 
      $display("|   (this test is not supported in FPGA mode)   |");
 
      $display(" ===============================================");
 
      $finish;
 
`endif
`endif
 
 
      stimulus_done = 1;
      stimulus_done = 1;
   end
   end
 
 
 
 
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