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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [clock_module_asic_mclk.v] - Diff between revs 134 and 180

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Rev 134 Rev 180
Line 59... Line 59...
      repeat(5) @(posedge mclk);
      repeat(5) @(posedge mclk);
      stimulus_done = 0;
      stimulus_done = 0;
 
 
      force tb_openMSP430.dut.wdt_reset = 1'b0;
      force tb_openMSP430.dut.wdt_reset = 1'b0;
 
 
`ifdef ASIC
`ifdef ASIC_CLOCKING
 
 
      //--------------------------------------------------------
      //--------------------------------------------------------
      // MCLK GENERATION - LFXT_CLK INPUT
      // MCLK GENERATION - LFXT_CLK INPUT
      //--------------------------------------------------------
      //--------------------------------------------------------
 
 

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