OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [dbg_uart_hwbrk1.s43] - Diff between revs 141 and 154

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 141 Rev 154
?rev1line?
?rev2line?
 
/*===========================================================================*/
 
/* Copyright (C) 2001 Authors                                                */
 
/*                                                                           */
 
/* This source file may be used and distributed without restriction provided */
 
/* that this copyright statement is not removed from the file and that any   */
 
/* derivative work contains the original copyright notice and the associated */
 
/* disclaimer.                                                               */
 
/*                                                                           */
 
/* This source file is free software; you can redistribute it and/or modify  */
 
/* it under the terms of the GNU Lesser General Public License as published  */
 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
 
/* (at your option) any later versixon.                                       */
 
/*                                                                           */
 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
 
/* License for more details.                                                 */
 
/*                                                                           */
 
/* You should have received a copy of the GNU Lesser General Public License  */
 
/* along with this source; if not, write to the Free Software Foundation,    */
 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
 
/*                                                                           */
 
/*===========================================================================*/
 
/*                            DEBUG INTERFACE                                */
 
/*---------------------------------------------------------------------------*/
 
/* Test the debug interface:                                                 */
 
/*                        - Check Hardware breakpoint unit 1.                */
 
/*                                                                           */
 
/* Author(s):                                                                */
 
/*             - Olivier Girard,    olgirard@gmail.com                       */
 
/*                                                                           */
 
/*---------------------------------------------------------------------------*/
 
/* $Rev: 154 $                                                                */
 
/* $LastChangedBy: olivier.girard $                                          */
 
/* $LastChangedDate: 2012-10-15 22:44:20 +0200 (Mon, 15 Oct 2012) $          */
 
/*===========================================================================*/
 
 
 
.include "pmem_defs.asm"
 
 
 
.global main
 
 
 
 
 
WAIT_FUNC:
 
        inc &DMEM_206
 
        inc &DMEM_202
 
        inc &DMEM_204
 
        inc &DMEM_200
 
        inc &DMEM_208
 
        mov &DMEM_204, r10
 
        mov &DMEM_208, r9
 
        dec r14
 
        jnz WAIT_FUNC
 
        ret
 
 
 
main:
 
        mov #DMEM_250, r1       ; # Initialize stack pointer
 
        mov   #0x0000, &DMEM_200
 
        mov   #0x0000, r15
 
 
 
       /* --------------                ACLK GENERATION             ----------------- */
 
 
 
        mov  #0x0001, r15
 
        mov  #0x0000, &DMEM_200
 
        mov  #0x0001, &DMEM_202
 
        mov  #0x0002, &DMEM_204
 
        mov  #0x0003, &DMEM_206
 
        mov  #0x0004, &DMEM_208
 
        mov  #0x0080, r14
 
        call #WAIT_FUNC
 
 
 
        mov  #0x1000, r15
 
 
 
 
 
 
 
 
 
        /* ----------------------         END OF TEST        --------------- */
 
end_of_test:
 
        nop
 
        br #0xffff
 
 
 
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
 
 
.section .vectors, "a"
 
.word end_of_test        ; Interrupt  0 (lowest priority)    
 
.word end_of_test        ; Interrupt  1                      
 
.word end_of_test        ; Interrupt  2                      
 
.word end_of_test        ; Interrupt  3                      
 
.word end_of_test        ; Interrupt  4                      
 
.word end_of_test        ; Interrupt  5                      
 
.word end_of_test        ; Interrupt  6                      
 
.word end_of_test        ; Interrupt  7                      
 
.word end_of_test        ; Interrupt  8                      
 
.word end_of_test        ; Interrupt  9                      
 
.word end_of_test        ; Interrupt 10                      Watchdog timer
 
.word end_of_test        ; Interrupt 11                      
 
.word end_of_test        ; Interrupt 12                      
 
.word end_of_test        ; Interrupt 13                      
 
.word end_of_test        ; Interrupt 14                      NMI
 
.word main               ; Interrupt 15 (highest priority)   RESET

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.