URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [dbg_uart_onoff.v] - Diff between revs 180 and 192

Rev 180	Rev 192
Line 198...	Line 198...
`dbg_uart_wr(CPU_CTL, 16'h0002);`	`dbg_uart_wr(CPU_CTL, 16'h0002);`

`test_nr = 8;`	`test_nr = 8;`

`// Generate IRQ to terminate the test pattern`	`// Generate IRQ to terminate the test pattern`
`irq[1] = 1'b1;`	irq[`IRQ_NR-15] = 1'b1;
`@(r13);`	`@(r13);`
`irq[1] = 1'b0;`	irq[`IRQ_NR-15] = 1'b0;

`stimulus_done = 1;`	`stimulus_done = 1;`

`endif	`endif
`else	`else