| Line 29... |
Line 29... |
/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
|
/* */
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/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
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/* $Rev: 79 $ */
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/* $Rev: 111 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2010-11-23 20:36:16 +0100 (Tue, 23 Nov 2010) $ */
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/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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|
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.global main
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.global main
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|
|
|
.set DMEM_BASE, (__data_start )
|
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_201, (__data_start+0x01)
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.set DMEM_202, (__data_start+0x02)
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.set DMEM_203, (__data_start+0x03)
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.set DMEM_204, (__data_start+0x04)
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.set DMEM_205, (__data_start+0x05)
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.set DMEM_206, (__data_start+0x06)
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.set DMEM_207, (__data_start+0x07)
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.set DMEM_208, (__data_start+0x08)
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.set DMEM_209, (__data_start+0x09)
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.set DMEM_20A, (__data_start+0x0A)
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.set DMEM_20B, (__data_start+0x0B)
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.set DMEM_20C, (__data_start+0x0C)
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.set DMEM_20D, (__data_start+0x0D)
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.set DMEM_20E, (__data_start+0x0E)
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.set DMEM_20F, (__data_start+0x0F)
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.set DMEM_210, (__data_start+0x10)
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.set DMEM_211, (__data_start+0x11)
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.set DMEM_212, (__data_start+0x12)
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.set DMEM_213, (__data_start+0x13)
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.set DMEM_214, (__data_start+0x14)
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.set DMEM_215, (__data_start+0x15)
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.set DMEM_216, (__data_start+0x16)
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.set DMEM_217, (__data_start+0x17)
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.set DMEM_218, (__data_start+0x18)
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.set DMEM_219, (__data_start+0x19)
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.set DMEM_21A, (__data_start+0x1A)
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.set DMEM_21B, (__data_start+0x1B)
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.set DMEM_21C, (__data_start+0x1C)
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.set DMEM_21D, (__data_start+0x1D)
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.set DMEM_21E, (__data_start+0x1E)
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.set DMEM_21F, (__data_start+0x1F)
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.set DMEM_220, (__data_start+0x20)
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.set DMEM_221, (__data_start+0x21)
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.set DMEM_222, (__data_start+0x22)
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.set DMEM_223, (__data_start+0x23)
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.set DMEM_224, (__data_start+0x24)
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.set DMEM_225, (__data_start+0x25)
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.set DMEM_226, (__data_start+0x26)
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.set DMEM_227, (__data_start+0x27)
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.set DMEM_228, (__data_start+0x28)
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.set DMEM_230, (__data_start+0x30)
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.set DMEM_231, (__data_start+0x31)
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.set DMEM_232, (__data_start+0x32)
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.set DMEM_233, (__data_start+0x33)
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.set DMEM_234, (__data_start+0x34)
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.set DMEM_235, (__data_start+0x35)
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.set DMEM_236, (__data_start+0x36)
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.set DMEM_237, (__data_start+0x37)
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.set DMEM_238, (__data_start+0x38)
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.set DMEM_240, (__data_start+0x40)
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.set DMEM_241, (__data_start+0x41)
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.set DMEM_242, (__data_start+0x42)
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.set DMEM_243, (__data_start+0x43)
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.set DMEM_244, (__data_start+0x44)
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.set DMEM_245, (__data_start+0x45)
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.set DMEM_246, (__data_start+0x46)
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.set DMEM_247, (__data_start+0x47)
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.set DMEM_248, (__data_start+0x48)
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.set DMEM_250, (__data_start+0x50)
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.set DMEM_251, (__data_start+0x51)
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.set DMEM_252, (__data_start+0x52)
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.set DMEM_253, (__data_start+0x53)
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.set DMEM_254, (__data_start+0x54)
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.set DMEM_255, (__data_start+0x55)
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.set DMEM_256, (__data_start+0x56)
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.set DMEM_257, (__data_start+0x57)
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.set DMEM_258, (__data_start+0x58)
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|
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.set P1IN, 0x0020
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.set P1IN, 0x0020
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.set P1OUT, 0x0021
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.set P1OUT, 0x0021
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.set P1DIR, 0x0022
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.set P1DIR, 0x0022
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.set P1IFG, 0x0023
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.set P1IFG, 0x0023
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.set P1IES, 0x0024
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.set P1IES, 0x0024
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| Line 71... |
Line 141... |
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main:
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main:
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/* -------------- PORT 1: TEST RD/WR REGISTER ACCESS --------------- */
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/* -------------- PORT 1: TEST RD/WR REGISTER ACCESS --------------- */
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|
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mov.b #0xaa, &P1IN ; P1IN
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mov.b #0xaa, &P1IN ; P1IN
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mov.b &P1IN, &0x0200
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mov.b &P1IN, &DMEM_200
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mov.b #0x55, &P1IN
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mov.b #0x55, &P1IN
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mov.b &P1IN, &0x0201
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mov.b &P1IN, &DMEM_201
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|
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mov.b #0xaa, &P1OUT ; P1OUT
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mov.b #0xaa, &P1OUT ; P1OUT
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mov.b &P1OUT, &0x0202
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mov.b &P1OUT, &DMEM_202
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mov.b #0x55, &P1OUT
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mov.b #0x55, &P1OUT
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mov.b &P1OUT, &0x0203
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mov.b &P1OUT, &DMEM_203
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|
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mov.b #0x5a, &P1DIR ; P1DIR
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mov.b #0x5a, &P1DIR ; P1DIR
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mov.b &P1DIR, &0x0204
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mov.b &P1DIR, &DMEM_204
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mov.b #0xa5, &P1DIR
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mov.b #0xa5, &P1DIR
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mov.b &P1DIR, &0x0205
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mov.b &P1DIR, &DMEM_205
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|
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mov.b #0x55, &P1IFG ; P1IFG
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mov.b #0x55, &P1IFG ; P1IFG
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mov.b &P1IFG, &0x0206
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mov.b &P1IFG, &DMEM_206
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mov.b #0xaa, &P1IFG
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mov.b #0xaa, &P1IFG
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mov.b &P1IFG, &0x0207
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mov.b &P1IFG, &DMEM_207
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|
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mov.b #0xa5, &P1IES ; P1IES
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mov.b #0xa5, &P1IES ; P1IES
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mov.b &P1IES, &0x0208
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mov.b &P1IES, &DMEM_208
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mov.b #0x5a, &P1IES
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mov.b #0x5a, &P1IES
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mov.b &P1IES, &0x0209
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mov.b &P1IES, &DMEM_209
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|
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mov.b #0xaa, &P1IE ; P1IE
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mov.b #0xaa, &P1IE ; P1IE
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mov.b &P1IE, &0x020A
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mov.b &P1IE, &DMEM_20A
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mov.b #0x55, &P1IE
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mov.b #0x55, &P1IE
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mov.b &P1IE, &0x020B
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mov.b &P1IE, &DMEM_20B
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|
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mov.b #0xcd, &P1SEL ; P1SEL
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mov.b #0xcd, &P1SEL ; P1SEL
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mov.b &P1SEL, &0x020C
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mov.b &P1SEL, &DMEM_20C
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mov.b #0x32, &P1SEL
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mov.b #0x32, &P1SEL
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mov.b &P1SEL, &0x020D
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mov.b &P1SEL, &DMEM_20D
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|
|
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mov.b #0x00, &P1IN ; Re-Initialize
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mov.b #0x00, &P1IN ; Re-Initialize
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mov.b #0x00, &P1OUT
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mov.b #0x00, &P1OUT
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mov.b #0x00, &P1DIR
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mov.b #0x00, &P1DIR
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| Line 120... |
Line 190... |
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|
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/* -------------- PORT 2: TEST RD/WR REGISTER ACCESS --------------- */
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/* -------------- PORT 2: TEST RD/WR REGISTER ACCESS --------------- */
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|
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mov.b #0xaa, &P2IN ; P2IN
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mov.b #0xaa, &P2IN ; P2IN
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mov.b &P2IN, &0x0210
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mov.b &P2IN, &DMEM_210
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mov.b #0x55, &P2IN
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mov.b #0x55, &P2IN
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mov.b &P2IN, &0x0211
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mov.b &P2IN, &DMEM_211
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|
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mov.b #0xaa, &P2OUT ; P2OUT
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mov.b #0xaa, &P2OUT ; P2OUT
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mov.b &P2OUT, &0x0212
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mov.b &P2OUT, &DMEM_212
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mov.b #0x55, &P2OUT
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mov.b #0x55, &P2OUT
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mov.b &P2OUT, &0x0213
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mov.b &P2OUT, &DMEM_213
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|
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mov.b #0x5a, &P2DIR ; P2DIR
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mov.b #0x5a, &P2DIR ; P2DIR
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mov.b &P2DIR, &0x0214
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mov.b &P2DIR, &DMEM_214
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mov.b #0xa5, &P2DIR
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mov.b #0xa5, &P2DIR
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mov.b &P2DIR, &0x0215
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mov.b &P2DIR, &DMEM_215
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|
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mov.b #0x55, &P2IFG ; P2IFG
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mov.b #0x55, &P2IFG ; P2IFG
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mov.b &P2IFG, &0x0216
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mov.b &P2IFG, &DMEM_216
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mov.b #0xaa, &P2IFG
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mov.b #0xaa, &P2IFG
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mov.b &P2IFG, &0x0217
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mov.b &P2IFG, &DMEM_217
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|
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mov.b #0xa5, &P2IES ; P2IES
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mov.b #0xa5, &P2IES ; P2IES
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mov.b &P2IES, &0x0218
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mov.b &P2IES, &DMEM_218
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mov.b #0x5a, &P2IES
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mov.b #0x5a, &P2IES
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mov.b &P2IES, &0x0219
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mov.b &P2IES, &DMEM_219
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|
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mov.b #0xaa, &P2IE ; P2IE
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mov.b #0xaa, &P2IE ; P2IE
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mov.b &P2IE, &0x021A
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mov.b &P2IE, &DMEM_21A
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mov.b #0x55, &P2IE
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mov.b #0x55, &P2IE
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mov.b &P2IE, &0x021B
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mov.b &P2IE, &DMEM_21B
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|
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mov.b #0xcd, &P2SEL ; P2SEL
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mov.b #0xcd, &P2SEL ; P2SEL
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mov.b &P2SEL, &0x021C
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mov.b &P2SEL, &DMEM_21C
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mov.b #0x32, &P2SEL
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mov.b #0x32, &P2SEL
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mov.b &P2SEL, &0x021D
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mov.b &P2SEL, &DMEM_21D
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|
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mov.b #0x00, &P2IN ; Re-Initialize
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mov.b #0x00, &P2IN ; Re-Initialize
|
mov.b #0x00, &P2OUT
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mov.b #0x00, &P2OUT
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mov.b #0x00, &P2DIR
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mov.b #0x00, &P2DIR
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mov.b #0x00, &P2IFG
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mov.b #0x00, &P2IFG
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| Line 168... |
Line 238... |
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|
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/* -------------- PORT 3: TEST RD/WR REGISTER ACCESS --------------- */
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/* -------------- PORT 3: TEST RD/WR REGISTER ACCESS --------------- */
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|
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mov.b #0xaa, &P3IN ; P3IN
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mov.b #0xaa, &P3IN ; P3IN
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mov.b &P3IN, &0x0220
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mov.b &P3IN, &DMEM_220
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mov.b #0x55, &P3IN
|
mov.b #0x55, &P3IN
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mov.b &P3IN, &0x0221
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mov.b &P3IN, &DMEM_221
|
|
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mov.b #0xaa, &P3OUT ; P3OUT
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mov.b #0xaa, &P3OUT ; P3OUT
|
mov.b &P3OUT, &0x0222
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mov.b &P3OUT, &DMEM_222
|
mov.b #0x55, &P3OUT
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mov.b #0x55, &P3OUT
|
mov.b &P3OUT, &0x0223
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mov.b &P3OUT, &DMEM_223
|
|
|
mov.b #0x5a, &P3DIR ; P3DIR
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mov.b #0x5a, &P3DIR ; P3DIR
|
mov.b &P3DIR, &0x0224
|
mov.b &P3DIR, &DMEM_224
|
mov.b #0xa5, &P3DIR
|
mov.b #0xa5, &P3DIR
|
mov.b &P3DIR, &0x0225
|
mov.b &P3DIR, &DMEM_225
|
|
|
mov.b #0xcd, &P3SEL ; P3SEL
|
mov.b #0xcd, &P3SEL ; P3SEL
|
mov.b &P3SEL, &0x0226
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mov.b &P3SEL, &DMEM_226
|
mov.b #0x32, &P3SEL
|
mov.b #0x32, &P3SEL
|
mov.b &P3SEL, &0x0227
|
mov.b &P3SEL, &DMEM_227
|
|
|
mov.b #0x00, &P3IN ; Re-Initialize
|
mov.b #0x00, &P3IN ; Re-Initialize
|
mov.b #0x00, &P3OUT
|
mov.b #0x00, &P3OUT
|
mov.b #0x00, &P3DIR
|
mov.b #0x00, &P3DIR
|
mov.b #0x00, &P3SEL
|
mov.b #0x00, &P3SEL
|
| Line 198... |
Line 268... |
|
|
|
|
/* -------------- PORT 4: TEST RD/WR REGISTER ACCESS --------------- */
|
/* -------------- PORT 4: TEST RD/WR REGISTER ACCESS --------------- */
|
|
|
mov.b #0xaa, &P4IN ; P4IN
|
mov.b #0xaa, &P4IN ; P4IN
|
mov.b &P4IN, &0x0230
|
mov.b &P4IN, &DMEM_230
|
mov.b #0x55, &P4IN
|
mov.b #0x55, &P4IN
|
mov.b &P4IN, &0x0231
|
mov.b &P4IN, &DMEM_231
|
|
|
mov.b #0xaa, &P4OUT ; P4OUT
|
mov.b #0xaa, &P4OUT ; P4OUT
|
mov.b &P4OUT, &0x0232
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mov.b &P4OUT, &DMEM_232
|
mov.b #0x55, &P4OUT
|
mov.b #0x55, &P4OUT
|
mov.b &P4OUT, &0x0233
|
mov.b &P4OUT, &DMEM_233
|
|
|
mov.b #0x5a, &P4DIR ; P4DIR
|
mov.b #0x5a, &P4DIR ; P4DIR
|
mov.b &P4DIR, &0x0234
|
mov.b &P4DIR, &DMEM_234
|
mov.b #0xa5, &P4DIR
|
mov.b #0xa5, &P4DIR
|
mov.b &P4DIR, &0x0235
|
mov.b &P4DIR, &DMEM_235
|
|
|
mov.b #0xcd, &P4SEL ; P4SEL
|
mov.b #0xcd, &P4SEL ; P4SEL
|
mov.b &P4SEL, &0x0236
|
mov.b &P4SEL, &DMEM_236
|
mov.b #0x32, &P4SEL
|
mov.b #0x32, &P4SEL
|
mov.b &P4SEL, &0x0237
|
mov.b &P4SEL, &DMEM_237
|
|
|
mov.b #0x00, &P4IN ; Re-Initialize
|
mov.b #0x00, &P4IN ; Re-Initialize
|
mov.b #0x00, &P4OUT
|
mov.b #0x00, &P4OUT
|
mov.b #0x00, &P4DIR
|
mov.b #0x00, &P4DIR
|
mov.b #0x00, &P4SEL
|
mov.b #0x00, &P4SEL
|
| Line 228... |
Line 298... |
|
|
|
|
/* -------------- PORT 5: TEST RD/WR REGISTER ACCESS --------------- */
|
/* -------------- PORT 5: TEST RD/WR REGISTER ACCESS --------------- */
|
|
|
mov.b #0xaa, &P5IN ; P5IN
|
mov.b #0xaa, &P5IN ; P5IN
|
mov.b &P5IN, &0x0240
|
mov.b &P5IN, &DMEM_240
|
mov.b #0x55, &P5IN
|
mov.b #0x55, &P5IN
|
mov.b &P5IN, &0x0241
|
mov.b &P5IN, &DMEM_241
|
|
|
mov.b #0xaa, &P5OUT ; P5OUT
|
mov.b #0xaa, &P5OUT ; P5OUT
|
mov.b &P5OUT, &0x0242
|
mov.b &P5OUT, &DMEM_242
|
mov.b #0x55, &P5OUT
|
mov.b #0x55, &P5OUT
|
mov.b &P5OUT, &0x0243
|
mov.b &P5OUT, &DMEM_243
|
|
|
mov.b #0x5a, &P5DIR ; P5DIR
|
mov.b #0x5a, &P5DIR ; P5DIR
|
mov.b &P5DIR, &0x0244
|
mov.b &P5DIR, &DMEM_244
|
mov.b #0xa5, &P5DIR
|
mov.b #0xa5, &P5DIR
|
mov.b &P5DIR, &0x0245
|
mov.b &P5DIR, &DMEM_245
|
|
|
mov.b #0xcd, &P5SEL ; P5SEL
|
mov.b #0xcd, &P5SEL ; P5SEL
|
mov.b &P5SEL, &0x0246
|
mov.b &P5SEL, &DMEM_246
|
mov.b #0x32, &P5SEL
|
mov.b #0x32, &P5SEL
|
mov.b &P5SEL, &0x0247
|
mov.b &P5SEL, &DMEM_247
|
|
|
mov.b #0x00, &P5IN ; Re-Initialize
|
mov.b #0x00, &P5IN ; Re-Initialize
|
mov.b #0x00, &P5OUT
|
mov.b #0x00, &P5OUT
|
mov.b #0x00, &P5DIR
|
mov.b #0x00, &P5DIR
|
mov.b #0x00, &P5SEL
|
mov.b #0x00, &P5SEL
|
| Line 258... |
Line 328... |
|
|
|
|
/* -------------- PORT 6: TEST RD/WR REGISTER ACCESS --------------- */
|
/* -------------- PORT 6: TEST RD/WR REGISTER ACCESS --------------- */
|
|
|
mov.b #0xaa, &P6IN ; P6IN
|
mov.b #0xaa, &P6IN ; P6IN
|
mov.b &P6IN, &0x0250
|
mov.b &P6IN, &DMEM_250
|
mov.b #0x55, &P6IN
|
mov.b #0x55, &P6IN
|
mov.b &P6IN, &0x0251
|
mov.b &P6IN, &DMEM_251
|
|
|
mov.b #0xaa, &P6OUT ; P6OUT
|
mov.b #0xaa, &P6OUT ; P6OUT
|
mov.b &P6OUT, &0x0252
|
mov.b &P6OUT, &DMEM_252
|
mov.b #0x55, &P6OUT
|
mov.b #0x55, &P6OUT
|
mov.b &P6OUT, &0x0253
|
mov.b &P6OUT, &DMEM_253
|
|
|
mov.b #0x5a, &P6DIR ; P6DIR
|
mov.b #0x5a, &P6DIR ; P6DIR
|
mov.b &P6DIR, &0x0254
|
mov.b &P6DIR, &DMEM_254
|
mov.b #0xa5, &P6DIR
|
mov.b #0xa5, &P6DIR
|
mov.b &P6DIR, &0x0255
|
mov.b &P6DIR, &DMEM_255
|
|
|
mov.b #0xcd, &P6SEL ; P6SEL
|
mov.b #0xcd, &P6SEL ; P6SEL
|
mov.b &P6SEL, &0x0256
|
mov.b &P6SEL, &DMEM_256
|
mov.b #0x32, &P6SEL
|
mov.b #0x32, &P6SEL
|
mov.b &P6SEL, &0x0257
|
mov.b &P6SEL, &DMEM_257
|
|
|
mov.b #0x00, &P6IN ; Re-Initialize
|
mov.b #0x00, &P6IN ; Re-Initialize
|
mov.b #0x00, &P6OUT
|
mov.b #0x00, &P6OUT
|
mov.b #0x00, &P6DIR
|
mov.b #0x00, &P6DIR
|
mov.b #0x00, &P6SEL
|
mov.b #0x00, &P6SEL
|
| Line 287... |
Line 357... |
mov #0x0006, r15
|
mov #0x0006, r15
|
|
|
|
|
/* -------------- PORT 1: TEST I/O FUNCTIONALITY --------------- */
|
/* -------------- PORT 1: TEST I/O FUNCTIONALITY --------------- */
|
|
|
mov #0x0200, r15 ;# Test Input path
|
mov #DMEM_200, r15 ;# Test Input path
|
nop
|
nop
|
p1_din_loop:
|
p1_din_loop:
|
mov.b &P1IN, 0(r15)
|
mov.b &P1IN, 0(r15)
|
inc r15
|
inc r15
|
cmp #0x0208, r15
|
cmp #DMEM_208, r15
|
jne p1_din_loop
|
jne p1_din_loop
|
|
|
|
|
mov.b #0x01, &P1OUT ; Test Output path
|
mov.b #0x01, &P1OUT ; Test Output path
|
mov #0x1100, r15
|
mov #0x1100, r15
|
| Line 330... |
Line 400... |
mov.b #0x00, &P1SEL
|
mov.b #0x00, &P1SEL
|
|
|
|
|
/* -------------- PORT 2: TEST I/O FUNCTIONALITY --------------- */
|
/* -------------- PORT 2: TEST I/O FUNCTIONALITY --------------- */
|
|
|
mov #0x0210, r15 ;# Test Input path
|
mov #DMEM_210, r15 ;# Test Input path
|
nop
|
nop
|
p2_din_loop:
|
p2_din_loop:
|
mov.b &P2IN, 0(r15)
|
mov.b &P2IN, 0(r15)
|
inc r15
|
inc r15
|
cmp #0x0218, r15
|
cmp #DMEM_218, r15
|
jne p2_din_loop
|
jne p2_din_loop
|
|
|
|
|
mov.b #0x01, &P2OUT ; Test Output path
|
mov.b #0x01, &P2OUT ; Test Output path
|
mov #0x2100, r15
|
mov #0x2100, r15
|
| Line 373... |
Line 443... |
mov.b #0x00, &P2SEL
|
mov.b #0x00, &P2SEL
|
|
|
|
|
/* -------------- PORT 3: TEST I/O FUNCTIONALITY --------------- */
|
/* -------------- PORT 3: TEST I/O FUNCTIONALITY --------------- */
|
|
|
mov #0x0220, r15 ;# Test Input path
|
mov #DMEM_220, r15 ;# Test Input path
|
nop
|
nop
|
p3_din_loop:
|
p3_din_loop:
|
mov.b &P3IN, 0(r15)
|
mov.b &P3IN, 0(r15)
|
inc r15
|
inc r15
|
cmp #0x0228, r15
|
cmp #DMEM_228, r15
|
jne p3_din_loop
|
jne p3_din_loop
|
|
|
|
|
mov.b #0x01, &P3OUT ; Test Output path
|
mov.b #0x01, &P3OUT ; Test Output path
|
mov #0x3100, r15
|
mov #0x3100, r15
|
| Line 416... |
Line 486... |
mov.b #0x00, &P3SEL
|
mov.b #0x00, &P3SEL
|
|
|
|
|
/* -------------- PORT 4: TEST I/O FUNCTIONALITY --------------- */
|
/* -------------- PORT 4: TEST I/O FUNCTIONALITY --------------- */
|
|
|
mov #0x0230, r15 ;# Test Input path
|
mov #DMEM_230, r15 ;# Test Input path
|
nop
|
nop
|
p4_din_loop:
|
p4_din_loop:
|
mov.b &P4IN, 0(r15)
|
mov.b &P4IN, 0(r15)
|
inc r15
|
inc r15
|
cmp #0x0238, r15
|
cmp #DMEM_238, r15
|
jne p4_din_loop
|
jne p4_din_loop
|
|
|
|
|
mov.b #0x01, &P4OUT ; Test Output path
|
mov.b #0x01, &P4OUT ; Test Output path
|
mov #0x4100, r15
|
mov #0x4100, r15
|
| Line 459... |
Line 529... |
mov.b #0x00, &P4SEL
|
mov.b #0x00, &P4SEL
|
|
|
|
|
/* -------------- PORT 5: TEST I/O FUNCTIONALITY --------------- */
|
/* -------------- PORT 5: TEST I/O FUNCTIONALITY --------------- */
|
|
|
mov #0x0240, r15 ;# Test Input path
|
mov #DMEM_240, r15 ;# Test Input path
|
nop
|
nop
|
p5_din_loop:
|
p5_din_loop:
|
mov.b &P5IN, 0(r15)
|
mov.b &P5IN, 0(r15)
|
inc r15
|
inc r15
|
cmp #0x0248, r15
|
cmp #DMEM_248, r15
|
jne p5_din_loop
|
jne p5_din_loop
|
|
|
|
|
mov.b #0x01, &P5OUT ; Test Output path
|
mov.b #0x01, &P5OUT ; Test Output path
|
mov #0x5100, r15
|
mov #0x5100, r15
|
| Line 502... |
Line 572... |
mov.b #0x00, &P5SEL
|
mov.b #0x00, &P5SEL
|
|
|
|
|
/* -------------- PORT 6: TEST I/O FUNCTIONALITY --------------- */
|
/* -------------- PORT 6: TEST I/O FUNCTIONALITY --------------- */
|
|
|
mov #0x0250, r15 ;# Test Input path
|
mov #DMEM_250, r15 ;# Test Input path
|
nop
|
nop
|
p6_din_loop:
|
p6_din_loop:
|
mov.b &P6IN, 0(r15)
|
mov.b &P6IN, 0(r15)
|
inc r15
|
inc r15
|
cmp #0x0258, r15
|
cmp #DMEM_258, r15
|
jne p6_din_loop
|
jne p6_din_loop
|
|
|
|
|
mov.b #0x01, &P6OUT ; Test Output path
|
mov.b #0x01, &P6OUT ; Test Output path
|
mov #0x6100, r15
|
mov #0x6100, r15
|
