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Line 29... |
/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 111 $ */
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/* $Rev: 141 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $ */
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/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.global main
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.include "pmem_defs.asm"
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.set DMEM_BASE, (__data_start )
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_201, (__data_start+0x01)
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.set DMEM_202, (__data_start+0x02)
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.set DMEM_203, (__data_start+0x03)
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.set DMEM_204, (__data_start+0x04)
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.set DMEM_205, (__data_start+0x05)
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.set DMEM_206, (__data_start+0x06)
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.set DMEM_207, (__data_start+0x07)
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.set DMEM_208, (__data_start+0x08)
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.set DMEM_209, (__data_start+0x09)
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.set DMEM_20A, (__data_start+0x0A)
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.set DMEM_20B, (__data_start+0x0B)
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.set DMEM_20C, (__data_start+0x0C)
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.set DMEM_20D, (__data_start+0x0D)
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.set DMEM_20E, (__data_start+0x0E)
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.set DMEM_20F, (__data_start+0x0F)
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.set DMEM_210, (__data_start+0x10)
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.set DMEM_211, (__data_start+0x11)
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.set DMEM_212, (__data_start+0x12)
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.set DMEM_213, (__data_start+0x13)
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.set DMEM_214, (__data_start+0x14)
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.set DMEM_215, (__data_start+0x15)
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.set DMEM_216, (__data_start+0x16)
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.set DMEM_217, (__data_start+0x17)
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.set DMEM_218, (__data_start+0x18)
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.set DMEM_219, (__data_start+0x19)
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.set DMEM_21A, (__data_start+0x1A)
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.set DMEM_21B, (__data_start+0x1B)
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.set DMEM_21C, (__data_start+0x1C)
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.set DMEM_21D, (__data_start+0x1D)
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.set DMEM_21E, (__data_start+0x1E)
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.set DMEM_21F, (__data_start+0x1F)
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.set DMEM_220, (__data_start+0x20)
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.set DMEM_221, (__data_start+0x21)
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.set DMEM_222, (__data_start+0x22)
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.set DMEM_223, (__data_start+0x23)
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.set DMEM_224, (__data_start+0x24)
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.set DMEM_225, (__data_start+0x25)
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.set DMEM_226, (__data_start+0x26)
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.set DMEM_227, (__data_start+0x27)
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.set DMEM_228, (__data_start+0x28)
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.set DMEM_230, (__data_start+0x30)
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.set DMEM_231, (__data_start+0x31)
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.set DMEM_232, (__data_start+0x32)
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.set DMEM_233, (__data_start+0x33)
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.set DMEM_234, (__data_start+0x34)
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.set DMEM_235, (__data_start+0x35)
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.set DMEM_236, (__data_start+0x36)
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.set DMEM_237, (__data_start+0x37)
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.set DMEM_238, (__data_start+0x38)
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.set DMEM_240, (__data_start+0x40)
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.set DMEM_241, (__data_start+0x41)
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.set DMEM_242, (__data_start+0x42)
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.set DMEM_243, (__data_start+0x43)
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.set DMEM_244, (__data_start+0x44)
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.set DMEM_245, (__data_start+0x45)
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.set DMEM_246, (__data_start+0x46)
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.set DMEM_247, (__data_start+0x47)
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.set DMEM_248, (__data_start+0x48)
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.set DMEM_250, (__data_start+0x50)
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.set DMEM_251, (__data_start+0x51)
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.set DMEM_252, (__data_start+0x52)
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.set DMEM_253, (__data_start+0x53)
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.set DMEM_254, (__data_start+0x54)
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.set DMEM_255, (__data_start+0x55)
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.set DMEM_256, (__data_start+0x56)
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.set DMEM_257, (__data_start+0x57)
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.set DMEM_258, (__data_start+0x58)
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.set P1IN, 0x0020
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.global main
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.set P1OUT, 0x0021
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.set P1DIR, 0x0022
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.set P1IFG, 0x0023
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.set P1IES, 0x0024
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.set P1IE, 0x0025
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.set P1SEL, 0x0026
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.set P2IN, 0x0028
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.set P2OUT, 0x0029
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.set P2DIR, 0x002A
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.set P2IFG, 0x002B
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.set P2IES, 0x002C
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.set P2IE, 0x002D
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.set P2SEL, 0x002E
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.set P3IN, 0x0018
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.set P3OUT, 0x0019
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.set P3DIR, 0x001A
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.set P3SEL, 0x001B
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.set P4IN, 0x001C
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.set P4OUT, 0x001D
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.set P4DIR, 0x001E
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.set P4SEL, 0x001F
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.set P5IN, 0x0030
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.set P5OUT, 0x0031
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.set P5DIR, 0x0032
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.set P5SEL, 0x0033
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.set P6IN, 0x0034
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.set P6OUT, 0x0035
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.set P6DIR, 0x0036
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.set P6SEL, 0x0037
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main:
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main:
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/* -------------- PORT 1: TEST RD/WR REGISTER ACCESS --------------- */
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/* -------------- PORT 1: TEST RD/WR REGISTER ACCESS --------------- */
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mov.b #0xaa, &P1IN ; P1IN
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mov.b #0xaa, &P1IN ; P1IN
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