URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [lp_modes_asic.v] - Diff between revs 200 and 202

Rev 200	Rev 202
Line 81...	Line 81...
`else wkup3_sync <= {wkup3_sync[0], wkup[3]};`	`else wkup3_sync <= {wkup3_sync[0], wkup[3]};`

`always @(wkup3_sync)`	`always @(wkup3_sync)`
irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3	irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3


`initial`	`initial`
`begin`	`begin`
`$display(" ===============================================");`	`$display(" ===============================================");`
`$display("\| START SIMULATION \|");`	`$display("\| START SIMULATION \|");`
`$display(" ===============================================");`	`$display(" ===============================================");`
Line 751...	Line 750...
`inst_cnt = 0;`	`inst_cnt = 0;`



`else	`else
`$display(" ===============================================");`	`tb_skip_finish("\| (this test is not supported in FPGA mode) \|");`
`$display("\| SIMULATION SKIPPED \|");`
`$display("\| (this test is not supported in FPGA mode) \|");`
`$display(" ===============================================");`
`$finish;`
`endif	`endif

`stimulus_done = 1;`	`stimulus_done = 1;`
`end`	`end`


`No newline at end of file`	`No newline at end of file`