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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes.v] - Diff between revs 79 and 95

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Rev 79 Rev 95
Line 30... Line 30...
/*                                                                           */
/*                                                                           */
/* Author(s):                                                                */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/* $Rev: 79 $                                                                */
/* $Rev: 95 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2010-11-23 20:36:16 +0100 (Tue, 23 Nov 2010) $          */
/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $          */
/*===========================================================================*/
/*===========================================================================*/
 
 
integer smclk_cnt;
integer smclk_cnt;
always @(negedge mclk)
always @(negedge mclk)
  if (smclk_en) smclk_cnt <= smclk_cnt+1;
  if (smclk_en) smclk_cnt <= smclk_cnt+1;
Line 144... Line 144...
 
 
      @(r15==16'h3001);
      @(r15==16'h3001);
      @(negedge mclk);
      @(negedge mclk);
      inst_cnt  = 0;
      inst_cnt  = 0;
      repeat (80) @(negedge mclk);
      repeat (80) @(negedge mclk);
      if (inst_cnt  !== 16'h0034) tb_error("====== CPUOFF TEST 1: CPU IS NOT RUNNING =====");
      if (inst_cnt  <= 16'h0030) tb_error("====== CPUOFF TEST 1: CPU IS NOT RUNNING =====");
 
 
      @(r15==16'h3002);
      @(r15==16'h3002);
      repeat (3) @(negedge mclk);
      repeat (3) @(negedge mclk);
      inst_cnt  = 0;
      inst_cnt  = 0;
      repeat (80) @(negedge mclk);
      repeat (80) @(negedge mclk);
Line 159... Line 159...
      repeat (2) @(posedge mclk);
      repeat (2) @(posedge mclk);
      p1_din[0] = 1'b0;
      p1_din[0] = 1'b0;
      @(negedge mclk);
      @(negedge mclk);
      inst_cnt  = 0;
      inst_cnt  = 0;
      repeat (80) @(negedge mclk);
      repeat (80) @(negedge mclk);
      if (inst_cnt !== 16'h0030) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");
      if (inst_cnt <= 16'h0025) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");
 
 
      @(r1==16'h0250);
      @(r1==16'h0250);
      repeat (3) @(negedge mclk);
      repeat (3) @(negedge mclk);
      inst_cnt  = 0;
      inst_cnt  = 0;
      repeat (80) @(negedge mclk);
      repeat (80) @(negedge mclk);
Line 174... Line 174...
      repeat (2) @(posedge mclk);
      repeat (2) @(posedge mclk);
      p2_din[0] = 1'b0;
      p2_din[0] = 1'b0;
      @(negedge mclk);
      @(negedge mclk);
      inst_cnt  = 0;
      inst_cnt  = 0;
      repeat (80) @(negedge mclk);
      repeat (80) @(negedge mclk);
      if (inst_cnt !== 16'h0030) tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ (PORT 2) =====");
      if (inst_cnt <= 16'h0025) tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ (PORT 2) =====");
 
 
      @(r15==16'h3003);
      @(r15==16'h3003);
      @(negedge mclk);
      @(negedge mclk);
      inst_cnt  = 0;
      inst_cnt  = 0;
      repeat (80) @(negedge mclk);
      repeat (80) @(negedge mclk);
      if (inst_cnt  !== 16'h0034) tb_error("====== CPUOFF TEST 6: CPU IS NOT RUNNING =====");
      if (inst_cnt  <= 16'h0030) tb_error("====== CPUOFF TEST 6: CPU IS NOT RUNNING =====");
 
 
 
 
      stimulus_done = 1;
      stimulus_done = 1;
   end
   end
 
 

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