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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_call.v] - Diff between revs 111 and 128

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Rev 111 Rev 128
Line 27... Line 27...
/*                                                                           */
/*                                                                           */
/* Author(s):                                                                */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/* $Rev: 111 $                                                                */
/* $Rev: 128 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $          */
/* $LastChangedDate: 2011-12-16 22:05:46 +0100 (Fri, 16 Dec 2011) $          */
/*===========================================================================*/
/*===========================================================================*/
 
 
initial
initial
   begin
   begin
      $display(" ===============================================");
      $display(" ===============================================");
      $display("|                 START SIMULATION              |");
      $display("|                 START SIMULATION              |");
      $display(" ===============================================");
      $display(" ===============================================");
      repeat(5) @(posedge mclk);
      repeat(5) @(posedge mclk);
      stimulus_done = 0;
      stimulus_done = 0;
 
 
 
      /* -------------- TEST INSTRUCTION WITH STANDARD REGISTERS AS ARGUMENT ------------------- */
 
 
      // Initialization
      // Initialization
      @(r15==16'h1000);
      @(r15==16'h1000);
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== SP  initialization =====");
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== SP  initialization =====");
      if (r5    !==16'h0000)             tb_error("====== R5  initialization  =====");
      if (r5    !==16'h0000)             tb_error("====== R5  initialization  =====");
 
 
Line 89... Line 91...
      @(r15==16'h8000);
      @(r15==16'h8000);
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== CALL (&EDE mode): SP value      =====");
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== CALL (&EDE mode): SP value      =====");
      if (r5    !==16'h6789)             tb_error("====== CALL (&EDE mode): R5 value      =====");
      if (r5    !==16'h6789)             tb_error("====== CALL (&EDE mode): R5 value      =====");
 
 
 
 
 
      /* -------------- TEST INSTRUCTION WITH SR AS ARGUMENT ------------------- */
 
 
 
 
 
      // Addressing mode: SR
 
      @(r15==16'h9000);
 
      //  --> not tested because it would require the cpu to execute from the data memory
 
 
 
 
 
      // Addressing mode: @SR
 
      @(r15==16'hA000);
 
      if (r5    !==16'habcd)             tb_error("====== CALL @SR  : R5 value      =====");
 
 
 
 
 
      // Addressing mode: @SR+
 
      @(r15==16'hB000);
 
      if (r5    !==16'h159a)             tb_error("====== CALL @SR+ : R5 value      =====");
 
 
 
 
 
      // Addressing mode: x(SR)
 
      @(r15==16'hC000);
 
      if (r5    !==16'h9abc)             tb_error("====== CALL x(SR) : R5 value      =====");
 
      if (r6    !==16'hef01)             tb_error("====== CALL x(SR) : R6 value      =====");
 
      if (r7    !==16'h2345)             tb_error("====== CALL x(SR) : R7 value      =====");
 
 
      stimulus_done = 1;
      stimulus_done = 1;
   end
   end
 
 
 
 
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