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Line 27... |
/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 19 $ */
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/* $Rev: 111 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.set DMEM_BASE, (__data_start )
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_202, (__data_start+0x02)
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.set DMEM_204, (__data_start+0x04)
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.set DMEM_206, (__data_start+0x06)
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.set DMEM_208, (__data_start+0x08)
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.set DMEM_209, (__data_start+0x09)
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.set DMEM_20A, (__data_start+0x0A)
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.set DMEM_20B, (__data_start+0x0B)
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.set DMEM_20C, (__data_start+0x0C)
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.set DMEM_20D, (__data_start+0x0D)
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.set DMEM_20E, (__data_start+0x0E)
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.set DMEM_20F, (__data_start+0x0F)
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.set DMEM_210, (__data_start+0x10)
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.set DMEM_212, (__data_start+0x12)
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.set DMEM_214, (__data_start+0x14)
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.set DMEM_216, (__data_start+0x16)
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.set DMEM_218, (__data_start+0x18)
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.set DMEM_219, (__data_start+0x19)
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.set DMEM_21A, (__data_start+0x1A)
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.set DMEM_21B, (__data_start+0x1B)
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.set DMEM_21C, (__data_start+0x1C)
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.set DMEM_21D, (__data_start+0x1D)
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.set DMEM_21E, (__data_start+0x1E)
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.set DMEM_21F, (__data_start+0x1F)
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.set DMEM_220, (__data_start+0x20)
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.set DMEM_222, (__data_start+0x22)
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.set DMEM_224, (__data_start+0x24)
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.global main
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.global main
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main:
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main:
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/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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Line 87... |
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# Addressing mode: @Rn
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# Addressing mode: @Rn
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#------------------------
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#------------------------
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mov #0x0102, r2 ;# Test 1
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mov #0x0102, r2 ;# Test 1
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mov #0x7524, &0x0200
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mov #0x7524, &DMEM_200
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mov #0x0200, r4
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mov #DMEM_200, r4
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mov #0xaaaa, &0x0202
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mov #0xaaaa, &DMEM_202
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swpb @r4 ;# SWPB (mem00=0x7524 => {mem00=0x2475)
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swpb @r4 ;# SWPB (mem00=0x7524 => {mem00=0x2475)
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mov r2, r5
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mov r2, r5
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mov #0x0005, r2 ;# Test 2
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mov #0x0005, r2 ;# Test 2
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mov #0x1cb6, &0x0202
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mov #0x1cb6, &DMEM_202
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mov #0x0202, r6
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mov #DMEM_202, r6
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mov #0xaaaa, &0x0204
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mov #0xaaaa, &DMEM_204
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swpb @r6 ;# SWPB (mem01=0x1cb6 => {mem01=0xb61c)
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swpb @r6 ;# SWPB (mem01=0x1cb6 => {mem01=0xb61c)
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mov r2, r7
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mov r2, r7
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mov #0x2000, r15
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mov #0x2000, r15
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# Addressing mode: @Rn+
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# Addressing mode: @Rn+
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#------------------------
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#------------------------
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mov #0x0102, r2 ;# Test 1
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mov #0x0102, r2 ;# Test 1
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mov #0x7524, &0x0208
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mov #0x7524, &DMEM_208
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mov #0x0208, r4
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mov #DMEM_208, r4
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mov #0xaaaa, &0x020A
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mov #0xaaaa, &DMEM_20A
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swpb @r4+ ;# SWPB (mem04=0x7524 => {mem04=0x2475)
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swpb @r4+ ;# SWPB (mem04=0x7524 => {mem04=0x2475)
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mov r2, r5
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mov r2, r5
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mov #0x0005, r2 ;# Test 2
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mov #0x0005, r2 ;# Test 2
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mov #0x1cb6, &0x020A
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mov #0x1cb6, &DMEM_20A
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mov #0x020A, r6
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mov #DMEM_20A, r6
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mov #0xaaaa, &0x020C
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mov #0xaaaa, &DMEM_20C
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swpb @r6+ ;# SWPB (mem05=0x1cb6 => {mem05=0xb61c)
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swpb @r6+ ;# SWPB (mem05=0x1cb6 => {mem05=0xb61c)
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mov r2, r7
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mov r2, r7
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mov #0x3000, r15
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mov #0x3000, r15
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# Addressing mode: X(Rn)
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# Addressing mode: X(Rn)
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#------------------------
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#------------------------
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mov #0x0102, r2 ;# Test 1
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mov #0x0102, r2 ;# Test 1
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mov #0x7524, &0x0210
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mov #0x7524, &DMEM_210
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mov #0x0200, r4
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mov #DMEM_200, r4
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mov #0xaaaa, &0x0212
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mov #0xaaaa, &DMEM_212
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swpb 16(r4) ;# SWPB (mem08=0x7524 => {mem08=0x2475)
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swpb 16(r4) ;# SWPB (mem08=0x7524 => {mem08=0x2475)
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mov r2, r5
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mov r2, r5
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mov #0x0005, r2 ;# Test 2
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mov #0x0005, r2 ;# Test 2
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mov #0x1cb6, &0x0212
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mov #0x1cb6, &DMEM_212
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mov #0x0200, r6
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mov #DMEM_200, r6
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mov #0xaaaa, &0x0214
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mov #0xaaaa, &DMEM_214
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swpb 18(r6) ;# SWPB (mem09=0x1cb6 => {mem09=0xb61c)
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swpb 18(r6) ;# SWPB (mem09=0x1cb6 => {mem09=0xb61c)
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mov r2, r7
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mov r2, r7
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mov #0x4000, r15
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mov #0x4000, r15
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# Addressing mode: EDE
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# Addressing mode: EDE
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#------------------------
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#------------------------
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.set EDE_218, (__data_start+0x0018)
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.set EDE_218, DMEM_218
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.set EDE_21A, (__data_start+0x001A)
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.set EDE_21A, DMEM_21A
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.set EDE_21C, (__data_start+0x001C)
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.set EDE_21C, DMEM_21C
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.set EDE_21E, (__data_start+0x001E)
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.set EDE_21E, DMEM_21E
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mov #0x0102, r2 ;# Test 1
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mov #0x0102, r2 ;# Test 1
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mov #0x7524, &0x0218
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mov #0x7524, &DMEM_218
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mov #0xaaaa, &0x021A
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mov #0xaaaa, &DMEM_21A
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swpb EDE_218 ;# SWPB (mem0c=0x7524 => {mem0c=0x2475)
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swpb EDE_218 ;# SWPB (mem0c=0x7524 => {mem0c=0x2475)
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mov r2, r5
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mov r2, r5
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mov #0x0005, r2 ;# Test 2
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mov #0x0005, r2 ;# Test 2
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mov #0x1cb6, &0x021A
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mov #0x1cb6, &DMEM_21A
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mov #0xaaaa, &0x021C
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mov #0xaaaa, &DMEM_21C
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swpb EDE_21A ;# SWPB (mem0d=0x1cb6 => {mem0d=0xb61c)
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swpb EDE_21A ;# SWPB (mem0d=0x1cb6 => {mem0d=0xb61c)
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mov r2, r7
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mov r2, r7
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mov #0x5000, r15
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mov #0x5000, r15
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# Addressing mode: &EDE
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# Addressing mode: &EDE
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#------------------------
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#------------------------
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.set aEDE_220, 0x0220
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.set aEDE_220, DMEM_220
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.set aEDE_222, 0x0222
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.set aEDE_222, DMEM_222
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.set aEDE_224, 0x0224
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.set aEDE_224, DMEM_224
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.set aEDE_226, 0x0226
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.set aEDE_226, DMEM_226
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mov #0x0102, r2 ;# Test 1
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mov #0x0102, r2 ;# Test 1
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mov #0x7524, &0x0220
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mov #0x7524, &DMEM_220
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mov #0xaaaa, &0x0222
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mov #0xaaaa, &DMEM_222
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swpb &aEDE_220 ;# SWPB (mem10=0x7524 => {mem10=0x2475)
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swpb &aEDE_220 ;# SWPB (mem10=0x7524 => {mem10=0x2475)
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mov r2, r5
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mov r2, r5
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mov #0x0005, r2 ;# Test 2
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mov #0x0005, r2 ;# Test 2
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mov #0x1cb6, &0x0222
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mov #0x1cb6, &DMEM_222
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mov #0xaaaa, &0x0224
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mov #0xaaaa, &DMEM_224
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swpb &aEDE_222 ;# SWPB (mem11=0x1cb6 => {mem11=0xb61c)
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swpb &aEDE_222 ;# SWPB (mem11=0x1cb6 => {mem11=0xb61c)
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mov r2, r7
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mov r2, r7
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mov #0x6000, r15
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mov #0x6000, r15
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