Line 28... |
Line 28... |
/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 19 $ */
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/* $Rev: 134 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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/* $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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integer my_counter;
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integer my_counter;
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always @ (posedge mclk)
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always @ (posedge mclk)
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my_counter <= my_counter+1;
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my_counter <= my_counter+1;
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Line 47... |
Line 47... |
$display("| START SIMULATION |");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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$display(" ===============================================");
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repeat(5) @(posedge mclk);
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repeat(5) @(posedge mclk);
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stimulus_done = 0;
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stimulus_done = 0;
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`ifdef ASIC
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$display(" ===============================================");
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$display("| SIMULATION SKIPPED |");
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$display("| (this test is not supported in ASIC mode) |");
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$display(" ===============================================");
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$finish;
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`else
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// TIMER A TEST: COMPARATOR 0
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// TIMER A TEST: COMPARATOR 0
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//--------------------------------------------------------
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//--------------------------------------------------------
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// --------- Output (mode 0) ----------
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// --------- Output (mode 0) ----------
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@(mem200 === 16'h0001);
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@(mem200 === 16'h0001);
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Line 368... |
Line 376... |
@(tar === 16'h001f);
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@(tar === 16'h001f);
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if (ta_out2 !== 1'b0) tb_error("====== TIMER_A COMPARE 2: Reset/Set (mode 7) =====");
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if (ta_out2 !== 1'b0) tb_error("====== TIMER_A COMPARE 2: Reset/Set (mode 7) =====");
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@(tar === 16'h0020);
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@(tar === 16'h0020);
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if (ta_out2 !== 1'b1) tb_error("====== TIMER_A COMPARE 2: Reset/Set (mode 7) =====");
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if (ta_out2 !== 1'b1) tb_error("====== TIMER_A COMPARE 2: Reset/Set (mode 7) =====");
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`endif
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stimulus_done = 1;
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stimulus_done = 1;
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end
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end
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No newline at end of file
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No newline at end of file
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