OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [wdt_clkmux.v] - Diff between revs 19 and 85

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 19 Rev 85
Line 28... Line 28...
/*                                                                           */
/*                                                                           */
/* Author(s):                                                                */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $Rev: 85 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/* $LastChangedDate: 2011-01-28 22:05:37 +0100 (Fri, 28 Jan 2011) $          */
/*===========================================================================*/
/*===========================================================================*/
 
 
`define LONG_TIMEOUT
`define LONG_TIMEOUT
 
 
integer mclk_counter;
integer mclk_counter;
Line 73... Line 73...
      @(r15 === 16'h1001);
      @(r15 === 16'h1001);
      @(negedge r5[0]);
      @(negedge r5[0]);
      @(negedge mclk);
      @(negedge mclk);
      mclk_counter = 0;
      mclk_counter = 0;
      r5_counter   = 0;
      r5_counter   = 0;
      repeat(7813) @(negedge mclk);
      repeat(7815) @(negedge mclk);
      if (mclk_counter !== 7813) tb_error("====== WATCHDOG TEST INTERVAL MODE /64 - ACLK =====");
      if (mclk_counter !== 7815) tb_error("====== WATCHDOG TEST INTERVAL MODE /64 - ACLK =====");
      if (r5_counter   !== 4)    tb_error("====== WATCHDOG TEST INTERVAL MODE /64 - ACLK =====");
      if (r5_counter   !== 4)    tb_error("====== WATCHDOG TEST INTERVAL MODE /64 - ACLK =====");
 
 
 
 
 
 
      stimulus_done = 1;
      stimulus_done = 1;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.