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Line 28... |
/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 19 $ */
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/* $Rev: 111 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.global main
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.global main
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.set DMEM_BASE, (__data_start )
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_250, (__data_start+0x50)
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.set IE1, 0x0000
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.set IE1, 0x0000
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.set IFG1, 0x0002
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.set IFG1, 0x0002
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.set WDTCTL, 0x0120
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.set WDTCTL, 0x0120
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Line 63... |
mov #0x1000, r15
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mov #0x1000, r15
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/* -------------- WATCHDOG TEST: INTERVAL MODE /64 ------------ */
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/* -------------- WATCHDOG TEST: INTERVAL MODE /64 ------------ */
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mov #0x0250, r1 ;# Initialize stack & Enable interrupts
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mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts
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eint
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eint
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bis.b #0x01, &IE1
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bis.b #0x01, &IE1
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mov #0x5a1b, &WDTCTL ;# Enable interval mode /64 & clear counter
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mov #0x5a1b, &WDTCTL ;# Enable interval mode /64 & clear counter
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Line 151... |
mov #0x2003, r15
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mov #0x2003, r15
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/* -------------- WATCHDOG TEST: INTERVAL MODE /512 ------------ */
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/* -------------- WATCHDOG TEST: INTERVAL MODE /512 ------------ */
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mov #0x0250, r1 ;# Initialize stack & Enable interrupts
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mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts
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eint
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eint
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bis.b #0x01, &IE1
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bis.b #0x01, &IE1
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mov #0x5a1a, &WDTCTL ;# Enable interval mode /512 & clear counter
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mov #0x5a1a, &WDTCTL ;# Enable interval mode /512 & clear counter
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Line 169... |
mov #0x3000, r15
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mov #0x3000, r15
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/* -------------- WATCHDOG TEST: INTERVAL MODE /8192 ------------ */
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/* -------------- WATCHDOG TEST: INTERVAL MODE /8192 ------------ */
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mov #0x0250, r1 ;# Initialize stack & Enable interrupts
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mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts
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eint
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eint
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bis.b #0x01, &IE1
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bis.b #0x01, &IE1
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mov #0x5a19, &WDTCTL ;# Enable interval mode /8192 & clear counter
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mov #0x5a19, &WDTCTL ;# Enable interval mode /8192 & clear counter
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Line 188... |
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/* -------------- WATCHDOG TEST: INTERVAL MODE /32768 ------------ */
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/* -------------- WATCHDOG TEST: INTERVAL MODE /32768 ------------ */
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mov #0x0250, r1 ;# Initialize stack & Enable interrupts
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mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts
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eint
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eint
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bis.b #0x01, &IE1
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bis.b #0x01, &IE1
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mov #0x5a18, &WDTCTL ;# Enable interval mode /32768 & clear counter
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mov #0x5a18, &WDTCTL ;# Enable interval mode /32768 & clear counter
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