URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
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| Rev 56 |
Rev 111 |
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Line 15... |
../../rtl/verilog/omsp_mem_backbone.v
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../../rtl/verilog/omsp_mem_backbone.v
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../../rtl/verilog/omsp_watchdog.v
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../../rtl/verilog/omsp_watchdog.v
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../../rtl/verilog/omsp_dbg.v
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../../rtl/verilog/omsp_dbg.v
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../../rtl/verilog/omsp_dbg_uart.v
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../../rtl/verilog/omsp_dbg_uart.v
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../../rtl/verilog/omsp_dbg_hwbrk.v
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../../rtl/verilog/omsp_dbg_hwbrk.v
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../../rtl/verilog/omsp_multiplier.v
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../../rtl/verilog/omsp_sync_cell.v
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}
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}
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set_svf ./results/$DESIGN_NAME.svf
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set_svf ./results/$DESIGN_NAME.svf
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define_design_lib WORK -path ./WORK
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define_design_lib WORK -path ./WORK
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analyze -format verilog $RTL_SOURCE_FILES
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analyze -format verilog $RTL_SOURCE_FILES
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elaborate $DESIGN_NAME
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elaborate $DESIGN_NAME
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