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<html><head><title>openMSP430 Overview</title></head><body>
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<title>openMSP430 Overview</title>
 
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<br />
 
<h1>Introduction</h1>
<h1>Introduction</h1>
 
 
The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog. It is compatible with Texas Instruments' <b><a href="http://www.ti.com/litv/pdf/slau049f">MSP430 microcontroller family</a></b> and can execute the code generated by an MSP430 toolchain in a cycle accurate way.
The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog. It is compatible with Texas Instruments' <b><a href="http://www.ti.com/litv/pdf/slau049f">MSP430 microcontroller family</a></b> and can execute the code generated by any MSP430 toolchain in a near cycle accurate way.<br><br>
<br /><br />
The core comes with some peripherals (<b>16x16 Hardware Multiplier, </b>Watchdog, GPIO, TimerA, generic templates) and most notably with a two-wire <b>Serial Debug Interface</b> supporting the<b> <a href="http://sourceforge.net/apps/mediawiki/mspgcc/index.php?title=MSPGCC_Wiki" target="_blank">MSPGCC</a> GNU Debugger</b> (GDB) for in-system software debugging.
The core comes with some peripherals (<b>16x16 Hardware Multiplier</b>, GPIO, TimerA, generic templates) and most notably with a <b>Serial Debug Interface</b> supporting <b>the MSPGCC(4) GNU Debugger</b> (GDB) for in-system software debugging.
<br><br>
<br /><br />
While being fully FPGA friendly, this design is also particularly
 
suited for ASIC implementations (typically mixed signal ICs with strong area
 
and low-power requirements).<br>
 
In a nutshell, the openMSP430 brings with it:<br>
 
<ul>
 
 
 
  <li>Low area (8k-Gates), without hidden extra infrastructure
 
overhead (memory backbone, IRQ controller and watchdog timer are already
 
included).</li>
 
 
 
  <li>Excellent code density.</li>
 
  <li>Good performances.</li>
 
 
 
  <li>Build-in power and clock managment options.</li>
 
  <li>Multiple time <span style="font-weight: bold;">Silicon Proven</span>.<br>
 
  </li>
 
</ul>
 
 
<h1>Download</h1>
<h1>Download</h1>
<h3>Design</h3>
<h3>Design</h3>
The complete tar archive of the project can be downloaded <a href="http://www.opencores.org/download,openmsp430">here</a> (OpenCores account required).<br />
The complete tar archive of the project can be downloaded <a href="http://www.opencores.org/download,openmsp430">here</a> (OpenCores account required).<br>
<br />
<br>
The following SVN command can be run from a console (or <a href="http://www.syntevo.com/smartsvn/index.html">GUI</a>):
The following SVN command can be run from a console (or <a href="http://www.syntevo.com/smartsvn/index.html">GUI</a>):
<br /><br />
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<td>
        <code>svn export http://opencores.org/ocsvn/openmsp430/openmsp430/trunk/ openmsp430</code>
        <code>svn export http://opencores.org/ocsvn/openmsp430/openmsp430/trunk/ openmsp430</code>
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<br />
<br>
<h3>ChangeLog</h3>
<h3>ChangeLog</h3>
<ul>
<ul>
   <li>The <a href="http://opencores.org/websvn,filedetails?repname=openmsp430&path=/openmsp430/trunk/ChangeLog_core.txt">Core's ChangeLog</a> lists the CPU updates.</li>
   <li>The <a href="http://opencores.org/websvn,filedetails?repname=openmsp430&amp;path=/openmsp430/trunk/ChangeLog_core.txt">Core's ChangeLog</a> lists the CPU updates.</li>
   <li>The <a href="http://opencores.org/websvn,filedetails?repname=openmsp430&path=/openmsp430/trunk/ChangeLog_tools.txt">Tools' ChangeLog</a> lists the Software development tools updates.</li>
   <li>The <a href="http://opencores.org/websvn,filedetails?repname=openmsp430&amp;path=/openmsp430/trunk/ChangeLog_tools.txt">Tools' ChangeLog</a> lists the Software development tools updates.</li>
   <li>Subscribe to the following <a href="http://opencores.org/websvn,rss?repname=openmsp430&path=/openmsp430/&isdir=1">RSS</a> feed to keep yourself informed about ALL updates.</i>
   <li>Subscribe to the following <a href="http://opencores.org/websvn,rss?repname=openmsp430&amp;path=/openmsp430/&amp;isdir=1">RSS</a> feed to keep yourself informed about ALL updates.
</ul>
</li></ul>
<br />
<br>
<h3>Documentation</h3>
<h3>Documentation</h3>Being fully compatible with the original MSP430 architecture, TI's official documentation is applicable: <a href="http://www.ti.com/lit/ug/slau049f/slau049f.pdf">SLAU049F.PDF</a><br><br>
The online documentation is available as <a href="usercontent,doc,1307395772" title="openMSP430 PDF Doc. R1.9">pdf</a>.
In addition, the openMSP430 online documentation is also available in <a href="http://opencores.org/websvn,filedetails?repname=openmsp430&amp;path=%2Fopenmsp430%2Ftrunk%2Fdoc%2FopenMSP430.pdf" title="openMSP430 PDF Doc. R1.9">pdf</a>.<br>
<br /><br />
 
<h1>Features & Limitations</h1>
<br>
 
<h1>Features &amp; Limitations</h1>
<h2>Features</h2>
<h2>Features</h2>
<ul>
<ul>
        <li><b>Core:</b>
        <li><b>Core:</b>
        <ul>
        <ul>
      <li>Full instruction set.</li>
      <li>Full instruction set support.</li>
      <li>Interrupts: IRQs (x14), NMI (x1).</li>
      <li>Interrupts: IRQs (x14), NMI (x1).</li>
      <li>Power saving modes functionality.</li>
      <li>Power saving modes.</li>
      <li>Configurable memory size for both program and data.</li>
      <li>Configurable memory size for both program and data.</li>
      <li>Scalable peripheral address space.</li>
      <li>Scalable peripheral address space.</li>
      <li>Serial Debug Interface (Nexus class 3, w/o trace) with GDB support.</li>
      <li>Two-wire Serial Debug Interface (Nexus class 3, w/o trace) with GDB support.</li>
      <li>FPGA friendly (single clock domain, no clock gate).</li>
      <li>FPGA friendly (option for single clock domain, no clock gate).</li>
 
      <li>ASIC friendly (options for full power &amp; clock management support).<br>
 
      </li>
 
 
      <li>Small size (Xilinx: 1650 LUTs / Altera: 1550 LEs / ASIC: 8k gates).</li>
      <li>Small size (Xilinx: 1650 LUTs / Altera: 1550 LEs / ASIC: 8k gates).</li>
        </ul>
        </ul>
        </li>
        </li>
        <br />
        <br>
        <li><b>Peripherals:</b>
        <li><b>Peripherals:</b>
        <ul>
        <ul>
      <li>16x16 Hardware Multiplier.</li>
      <li>16x16 Hardware Multiplier.</li>
      <li>Basic Clock Module.</li>
      <li>Basic Clock Module.</li>
      <li>Watchdog.</li>
      <li>Watchdog.</li>
      <li>Timer A.</li>
      <li>Timer A (FPGA only).</li>
      <li>GPIO (port 1 to 6).</li>
      <li>GPIOs (FPGA only).</li>
      <li>Templates for 8 and 16 bit peripherals (under BSD license).</li>
      <li>Templates for 8 and 16 bit peripherals.</li>
        </ul>
        </ul>
        </li>
        </li>
</ul>
</ul>
<h2>Limitations</h2>
<h2>Limitations</h2>
<ul>
<ul>
        <li><b>Core:</b>
        <li><b>Core:</b>
        <ul>
        <ul>
      <li>Instructions can't be executed from the data memory.</li>
      <li>Instructions can't be executed from the data memory.</li>
        </ul>
        </ul>
        </li>
        </li>
        <br />
 
        <li><b>Peripherals:</b>
 
        <ul>
 
      <li>Basic clock module doesn't offer the full functionality of a real MSP430.</li>
 
        </ul>
 
        </li>
 
</ul>
</ul>
<br /><br />
<br><br>
<h1>Links</h1>
<h1>Links</h1>
Development has been performed using the following freely available (excellent) tools:
Development has been performed using the following freely available (excellent) tools:
<ul>
<ul>
        <li><a href="http://www.icarus.com/eda/verilog/">Icarus Verilog</a>  : Verilog simulator.</li>
        <li><a href="http://iverilog.icarus.com/">Icarus Verilog</a>  : Verilog simulator.</li>
        <li><a href="http://gtkwave.sourceforge.net/">GTKWave Analyzer</a>   : Waveform viewer.</li>
        <li><a href="http://gtkwave.sourceforge.net/">GTKWave Analyzer</a>   : Waveform viewer.</li>
        <li><a href="http://mspgcc4.sourceforge.net/">MSPGCC4</a>            : GCC toolchain for the Texas Instruments MSP430 MCUs.</li>
        <li><a href="http://sourceforge.net/apps/mediawiki/mspgcc/index.php?title=MSPGCC_Wiki">MSPGCC</a>            : GCC toolchain for the Texas Instruments MSP430 MCUs.</li>
        <li><a href="http://www.xilinx.com/ise/logic_design_prod/webpack.htm">ISE WebPACK</a>   : Xilinx's FPGA synthesis tool.</li>
        <li><a href="http://www.xilinx.com/ise/logic_design_prod/webpack.htm">ISE WebPACK</a>   : Xilinx's free FPGA synthesis tool.</li>
</ul>
</ul>
Discussion group:
Discussion group:
<ul>
<ul>
        <li><table border=0 style="background-color: #fff; padding: 5px;" cellspacing=0>
        <li><input name="hl" value="en" type="hidden">
       <tr><td>
       <table style="padding: 5px; background-color: rgb(255, 255, 255);" border="0" cellspacing="0">
       <img src="http://groups.google.com/intl/en/images/logos/groups_logo_sm.gif"
       <tbody><tr><td>
            height=30 width=140 alt="Google Groups">
       <img src="http://groups.google.com/intl/en/images/logos/groups_logo_sm.gif" alt="Google Groups" height="30" width="140">
       </td></tr>
       </td></tr>
       <tr><td style="padding-left: 5px">
       <tr><td style="padding-left: 5px;">
       <b>Subscribe to openMSP430</b>
       <b>Subscribe to openMSP430</b>
       </td></tr>
       </td></tr>
       <form action="http://groups.google.com/group/discuss_openmsp430/boxsubscribe">
       <form action="http://groups.google.com/group/discuss_openmsp430/boxsubscribe"></form>
       <input type=hidden name="hl" value="en">
 
       <tr><td style="padding-left: 5px;">
       <tr><td style="padding-left: 5px;">
       Email: <input type=text name=email>
       Email: <input name="email" type="text">
       <input type=submit name="sub" value="Subscribe">
       <input name="sub" value="Subscribe" type="submit">
       </td></tr>
       </td></tr>
       </form>
 
       <tr><td align=right>
       <tr><td align="right">
       <a href="http://groups.google.com/group/discuss_openmsp430?hl=en">Visit this group</a>
       <a href="http://groups.google.com/group/discuss_openmsp430?hl=en">Visit this group</a>
       </td></tr>
       </td></tr>
       </table>
       </tbody></table>
   </li>
   </li>
</ul>
</ul>
A few MSP430 links:
A few MSP430 links:
<ul>
<ul>
        <li><a href="http://en.wikipedia.org/wiki/MSP430">Wikipedia: MSP430</a></li>
        <li><a href="http://en.wikipedia.org/wiki/MSP430">Wikipedia: MSP430</a></li>
        <li><a href="http://www.ti.com/litv/pdf/slau049f">TI: MSP430x1xx Family User's Guide</a></li>
        <li><a href="http://www.ti.com/litv/pdf/slau049f">TI: MSP430x1xx Family User's Guide</a></li>
 
  <li><a href="http://www.ti.com/lit/an/slaa205c/slaa205c.pdf">TI: MSP430 Competitive Benchmarking</a><br>
 
  </li>
 
 
        <li><a href="http://processors.wiki.ti.com/index.php/Open_Source_Projects_-_MSP430">TI: a list of available MSP430 Open Source projects out there on the web today.</a></li>
        <li><a href="http://processors.wiki.ti.com/index.php/Open_Source_Projects_-_MSP430">TI: a list of available MSP430 Open Source projects out there on the web today.</a></li>
</ul>
</ul>
<br /><br />
 
<h1>Legal information</h1>
 
MSP430 is a trademark of Texas Instruments, Inc. This project is not affiliated in any way with Texas Instruments. All other product names are trademarks or registered trademarks of their respective owners.
 
 
 
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<br><br>
 
<h1>Legal information</h1>MSP430 is a trademark of Texas Instruments,
 
Inc. This project is not affiliated in any way with Texas Instruments.
 
All other product names are trademarks or registered trademarks of
 
their respective owners. </body></html>
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