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<ul>
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<ul>
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<li>Low area (8k-Gates), without hidden extra infrastructure overhead (memory backbone, IRQ controller and watchdog timer are already included).</li>
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<li>Low area (8k-Gates), without hidden extra infrastructure overhead (memory backbone, IRQ controller and watchdog timer are already included).</li>
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<li>Excellent code density.</li>
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<li>Excellent code density.</li>
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<li>Good performances.</li>
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<li>Good performances.</li>
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<li>Build-in power and clock managment options.</li>
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<li>Build-in power and clock managment options.</li>
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<li>Multiple time <span style="font-weight: bold;">Silicon Proven</span>.</li>
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<li>Multiple times <span style="font-weight: bold;">Silicon Proven</span>.</li>
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</ul>
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</ul>
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</td>
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</td>
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<td style="vertical-align: top;">
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<td style="vertical-align: top;">
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<table border="0" cellpadding="0" cellspacing="0">
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<table border="0" cellpadding="0" cellspacing="0">
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<tbody>
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<tbody>
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<h2>Features</h2>
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<h2>Features</h2>
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<ul>
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<ul>
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<li><b>Core:</b>
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<li><b>Core:</b>
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<ul>
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<ul>
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<li>Full instruction set support.</li>
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<li>Full instruction set support.</li>
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<li>Interrupts: IRQs (x14), NMI (x1).</li>
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<li>Interrupts: IRQs (x14, x30 or x62), NMI (x1).</li>
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<li>Power saving modes.</li>
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<li>Low Power Modes (LPMx).</li>
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<li>Configurable memory size for both program and data.</li>
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<li>Configurable memory size for both program and data.</li>
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<li>Scalable peripheral address space.</li>
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<li>Scalable peripheral address space.</li>
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<li>Two-wire Serial Debug Interface (Nexus class 3, w/o trace) with GDB support (I<sup>2</sup>C or UART based).</li>
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<li>Two-wire Serial Debug Interface (I<sup>2</sup>C or UART based) with GDB support (Nexus class 3, w/o trace).</li>
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<li>FPGA friendly (option for single clock domain, no clock gate).</li>
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<li>FPGA friendly (option for single clock domain, no clock gate).</li>
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<li>ASIC friendly (options for full power & clock management support).<br>
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<li>ASIC friendly (options for full power & clock management support).<br>
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</li>
|
</li>
|
|
|
<li>Small size (Xilinx: 1650 LUTs / Altera: 1550 LEs / ASIC: 8k gates).</li>
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<li>Small size (Xilinx: 1650 LUTs / Altera: 1550 LEs / ASIC: 8k gates).</li>
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