| Line 90... |
Line 90... |
<td><font size="-1"> 1</font></td><td><font size="-1"> 0</font></td>
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<td><font size="-1"> 1</font></td><td><font size="-1"> 0</font></td>
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</tr>
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</tr>
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<tr align="center">
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<tr align="center">
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<td><font size="-1"><a href="#2.2.1 CPU_ID">CPU_ID_LO</a></font></td>
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<td><font size="-1"><a href="#2.2.1 CPU_ID">CPU_ID_LO</a></font></td>
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<td><font size="-1">0x00</font></td>
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<td><font size="-1">0x00</font></td>
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<td colspan="8"><font size="-5">CPU_ID[7:0]</font></td>
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<td colspan="16"><font size="-5">DMEM_AWIDTH</font></td>
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<td colspan="4"><font size="-5">PMEM_AWIDTH</font></td>
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<td colspan="4"><font size="-5">DMEM_AWIDTH</font></td>
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</tr>
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</tr>
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<tr align="center">
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<tr align="center">
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<td><font size="-1"><a href="#2.2.1 CPU_ID">CPU_ID_HI</a></font></td>
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<td><font size="-1"><a href="#2.2.1 CPU_ID">CPU_ID_HI</a></font></td>
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<td><font size="-1">0x01</font></td>
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<td><font size="-1">0x01</font></td>
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<td colspan="16"><font size="-5">CPU_ID[23:8]</font></td>
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<td colspan="16"><font size="-5">PMEM_AWIDTH</font></td>
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</tr>
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</tr>
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<tr align="center">
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<tr align="center">
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<td><font size="-1"><a href="#2.2.2 CPU_CTL">CPU_CTL</a></font></td>
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<td><font size="-1"><a href="#2.2.2 CPU_CTL">CPU_CTL</a></font></td>
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<td><font size="-1">0x02</font></td>
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<td><font size="-1">0x02</font></td>
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<td colspan="9"><font size="-5">Reserved</font></td>
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<td colspan="9"><font size="-5">Reserved</font></td>
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<div style="text-align: right"><a href="#TOC">Top</a></div>
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<div style="text-align: right"><a href="#TOC">Top</a></div>
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<h2>2.2 CPU Control/Status Registers</h2>
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<h2>2.2 CPU Control/Status Registers</h2>
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<a name="2.2.1 CPU_ID"></a>
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<a name="2.2.1 CPU_ID"></a>
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<h3>2.2.1 CPU_ID</h3>
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<h3>2.2.1 CPU_ID</h3>
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This 32 bit read-only register holds the ID of the implemented openMSP430 as well as the program and data memory size information.
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This 32 bit read-only register holds the program and data memory size information of the implemented openMSP430.
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<br /><br />
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<br /><br />
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<table border="1">
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<table border="1">
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<tr align="center">
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<tr align="center">
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<td rowspan="2" ><b><font size="-1">Register Name</font></b></td>
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<td rowspan="2" ><b><font size="-1">Register Name</font></b></td>
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<td rowspan="2" ><b><font size="-1">Address</font></b></td>
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<td rowspan="2" ><b><font size="-1">Address</font></b></td>
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<td><font size="-1"> 1</font></td><td><font size="-1"> 0</font></td>
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<td><font size="-1"> 1</font></td><td><font size="-1"> 0</font></td>
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</tr>
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</tr>
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<tr align="center">
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<tr align="center">
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<td><font size="-1">CPU_ID_LO</font></td>
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<td><font size="-1">CPU_ID_LO</font></td>
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<td><font size="-1">0x00</font></td>
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<td><font size="-1">0x00</font></td>
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<td colspan="8"><font size="-5">CPU_ID[7:0]</font></td>
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<td colspan="16"><font size="-5">DMEM_AWIDTH</font></td>
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<td colspan="4"><font size="-5">PMEM_AWIDTH</font></td>
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<td colspan="4"><font size="-5">DMEM_AWIDTH</font></td>
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</tr>
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</tr>
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<tr align="center">
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<tr align="center">
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<td><font size="-1">CPU_ID_HI</font></td>
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<td><font size="-1">CPU_ID_HI</font></td>
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<td><font size="-1">0x01</font></td>
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<td><font size="-1">0x01</font></td>
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<td colspan="16"><font size="-5">CPU_ID[23:7]</font></td>
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<td colspan="16"><font size="-5">PMEM_AWIDTH</font></td>
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</tr>
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</tr>
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</table>
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</table>
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<br />
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<br />
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<table border="0">
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<table border="0">
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<tr>
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<tr>
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<td> </td><td valign="top"><li><b>CPU_ID</b></li></td>
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<td>: Set by default to 0x4D5350 (ascii code for "MSP")</td>
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</tr>
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<tr>
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<td> </td><td valign="top"><li><b>PMEM_AWIDTH</b></li></td>
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<td> </td><td valign="top"><li><b>PMEM_AWIDTH</b></li></td>
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<td>: Program memory address width for the current implementation. The ROM or RAM size is then equal to 2<sup><font size="-3">PMEM_AWIDTH</font></sup></td>
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<td>: Program memory size in byte for the current implementation</td>
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</tr>
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</tr>
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<tr>
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<tr>
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<td> </td><td valign="top"><li><b>DMEM_AWIDTH</b></li></td>
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<td> </td><td valign="top"><li><b>DMEM_AWIDTH</b></li></td>
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<td>: Data memory address width for the current implementation. The RAM size is then equal to 2<sup><font size="-3">DMEM_AWIDTH</font></sup></td>
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<td>: Data memory size in byte for the current implementation.</td>
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</tr>
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</tr>
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</table>
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</table>
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<a name="2.2.2 CPU_CTL"></a>
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<a name="2.2.2 CPU_CTL"></a>
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<h3>2.2.2 CPU_CTL</h3>
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<h3>2.2.2 CPU_CTL</h3>
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