URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [bench/] [verilog/] [registers.v] - Diff between revs 80 and 111

Rev 80	Rev 111
Line 152...	Line 152...

`// CPU internals`	`// CPU internals`
`//======================`	`//======================`

`wire mclk = dut.openMSP430_0.mclk;`	`wire mclk = dut.openMSP430_0.mclk;`
`wire puc = dut.openMSP430_0.puc;`	`wire puc_rst = dut.openMSP430_0.puc_rst;`

`No newline at end of file`	`No newline at end of file`