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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openMSP430_fpga.v] - Diff between revs 111 and 136

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Rev 111 Rev 136
Line 302... Line 302...
//=============================================================================
//=============================================================================
 
 
openMSP430 openMSP430_0 (
openMSP430 openMSP430_0 (
 
 
// OUTPUTs
// OUTPUTs
    .aclk_en      (aclk_en),      // ACLK enable
    .aclk         (),             // ASIC ONLY: ACLK
 
    .aclk_en      (aclk_en),      // FPGA ONLY: ACLK enable
    .dbg_freeze   (dbg_freeze),   // Freeze peripherals
    .dbg_freeze   (dbg_freeze),   // Freeze peripherals
    .dbg_uart_txd (uart_tx),      // Debug interface: UART TXD
    .dbg_uart_txd (uart_tx),      // Debug interface: UART TXD
 
    .dco_enable   (),             // ASIC ONLY: Fast oscillator enable
 
    .dco_wkup     (),             // ASIC ONLY: Fast oscillator wake-up (asynchronous)
    .dmem_addr    (dmem_addr),    // Data Memory address
    .dmem_addr    (dmem_addr),    // Data Memory address
    .dmem_cen     (dmem_cen),     // Data Memory chip enable (low active)
    .dmem_cen     (dmem_cen),     // Data Memory chip enable (low active)
    .dmem_din     (dmem_din),     // Data Memory data input
    .dmem_din     (dmem_din),     // Data Memory data input
    .dmem_wen     (dmem_wen),     // Data Memory write enable (low active)
    .dmem_wen     (dmem_wen),     // Data Memory write enable (low active)
    .irq_acc      (irq_acc),      // Interrupt request accepted (one-hot signal)
    .irq_acc      (irq_acc),      // Interrupt request accepted (one-hot signal)
 
    .lfxt_enable  (),             // ASIC ONLY: Low frequency oscillator enable
 
    .lfxt_wkup    (),             // ASIC ONLY: Low frequency oscillator wake-up (asynchronous)
    .mclk         (mclk),         // Main system clock
    .mclk         (mclk),         // Main system clock
    .per_addr     (per_addr),     // Peripheral address
    .per_addr     (per_addr),     // Peripheral address
    .per_din      (per_din),      // Peripheral data input
    .per_din      (per_din),      // Peripheral data input
    .per_we       (per_we),       // Peripheral write enable (high active)
    .per_we       (per_we),       // Peripheral write enable (high active)
    .per_en       (per_en),       // Peripheral enable (high active)
    .per_en       (per_en),       // Peripheral enable (high active)
    .pmem_addr    (pmem_addr),    // Program Memory address
    .pmem_addr    (pmem_addr),    // Program Memory address
    .pmem_cen     (pmem_cen),     // Program Memory chip enable (low active)
    .pmem_cen     (pmem_cen),     // Program Memory chip enable (low active)
    .pmem_din     (pmem_din),     // Program Memory data input (optional)
    .pmem_din     (pmem_din),     // Program Memory data input (optional)
    .pmem_wen     (pmem_wen),     // Program Memory write enable (low active) (optional)
    .pmem_wen     (pmem_wen),     // Program Memory write enable (low active) (optional)
    .puc_rst      (puc_rst),      // Main system reset
    .puc_rst      (puc_rst),      // Main system reset
    .smclk_en     (smclk_en),     // SMCLK enable
    .smclk        (),             // ASIC ONLY: SMCLK
 
    .smclk_en     (smclk_en),     // FPGA ONLY: SMCLK enable
 
 
// INPUTs
// INPUTs
    .cpu_en       (1'b1),         // Enable CPU code execution (asynchronous)
    .cpu_en       (1'b1),         // Enable CPU code execution (asynchronous and non-glitchy)
    .dbg_en       (1'b1),         // Debug interface enable (asynchronous)
    .dbg_en       (1'b1),         // Debug interface enable (asynchronous and non-glitchy)
    .dbg_uart_rxd (uart_rx),      // Debug interface: UART RXD
    .dbg_uart_rxd (uart_rx),      // Debug interface: UART RXD (asynchronous)
    .dco_clk      (dco_clk),      // Fast oscillator (fast clock)
    .dco_clk      (dco_clk),      // Fast oscillator (fast clock)
    .dmem_dout    (dmem_dout),    // Data Memory data output
    .dmem_dout    (dmem_dout),    // Data Memory data output
    .irq          (irq_bus),      // Maskable interrupts
    .irq          (irq_bus),      // Maskable interrupts
    .lfxt_clk     (1'b0),         // Low frequency oscillator (typ 32kHz)
    .lfxt_clk     (1'b0),         // Low frequency oscillator (typ 32kHz)
    .nmi          (nmi),          // Non-maskable interrupt (asynchronous)
    .nmi          (nmi),          // Non-maskable interrupt (asynchronous)
    .per_dout     (per_dout),     // Peripheral data output
    .per_dout     (per_dout),     // Peripheral data output
    .pmem_dout    (pmem_dout),    // Program Memory data output
    .pmem_dout    (pmem_dout),    // Program Memory data output
    .reset_n      (reset_n)       // Reset Pin (low active)
    .reset_n      (reset_n),      // Reset Pin (low active, asynchronous and non-glitchy)
 
    .scan_enable  (1'b0),         // ASIC ONLY: Scan enable (active during scan shifting)
 
    .scan_mode    (1'b0),         // ASIC ONLY: Scan mode
 
    .wkup         (1'b0)          // ASIC ONLY: System Wake-up (asynchronous and non-glitchy)
);
);
 
 
 
 
//=============================================================================
//=============================================================================
// 5)  OPENMSP430 PERIPHERALS
// 5)  OPENMSP430 PERIPHERALS

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