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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_alu.v] - Diff between revs 193 and 202

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Rev 193	Rev 202
Line 34...	Line 34...
`//`	`//`
`// *Author(s):`	`// *Author(s):`
`// - Olivier Girard, olgirard@gmail.com`	`// - Olivier Girard, olgirard@gmail.com`
`//`	`//`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`// $Rev: 103 $`	`// $Rev$`
`// $LastChangedBy: olivier.girard $`	`// $LastChangedBy$`
`// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $`	`// $LastChangedDate$`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`ifdef OMSP_NO_INCLUDE	`ifdef OMSP_NO_INCLUDE
`else	`else
`include "openMSP430_defines.v"	`include "openMSP430_defines.v"
`endif	`endif
Line 248...	Line 248...
inst_alu[`ALU_XOR] ? {V_xor,N,Z,~Z} : {V,N,Z,C};	inst_alu[`ALU_XOR] ? {V_xor,N,Z,~Z} : {V,N,Z,C};

assign alu_stat_wr = (inst_alu[`ALU_STAT_F] & exec_cycle) ? 4'b1111 : 4'b0000;	assign alu_stat_wr = (inst_alu[`ALU_STAT_F] & exec_cycle) ? 4'b1111 : 4'b0000;


	`// LINT cleanup`
	wire UNUSED_inst_so_rra = inst_so[`RRA];
	wire UNUSED_inst_so_push = inst_so[`PUSH];
	wire UNUSED_inst_so_call = inst_so[`CALL];
	wire UNUSED_inst_so_reti = inst_so[`RETI];
	wire UNUSED_inst_jmp = inst_jmp[`JMP];
	wire UNUSED_inst_alu = inst_alu[`EXEC_NO_WR];

`endmodule // omsp_alu`	`endmodule // omsp_alu`

`ifdef OMSP_NO_INCLUDE	`ifdef OMSP_NO_INCLUDE
`else	`else
`include "openMSP430_undefines.v"	`include "openMSP430_undefines.v"

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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_alu.v] - Diff between revs 193 and 202