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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_and_gate.v] - Diff between revs 136 and 202

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Rev 136 Rev 202
Line 83... Line 83...
assign  y  =  a & b;
assign  y  =  a & b;
 
 
 
 
endmodule // omsp_and_gate
endmodule // omsp_and_gate
 
 
 
 
 
 
 
 
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