Line 159... |
Line 159... |
parameter [DEC_SZ-1:0] BCSCTL1_D = (BASE_REG << BCSCTL1),
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parameter [DEC_SZ-1:0] BCSCTL1_D = (BASE_REG << BCSCTL1),
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BCSCTL2_D = (BASE_REG << BCSCTL2);
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BCSCTL2_D = (BASE_REG << BCSCTL2);
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// Local wire declarations
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// Local wire declarations
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wire nodiv_mclk;
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wire nodiv_mclk;
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wire nodiv_mclk_n;
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wire nodiv_smclk;
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wire nodiv_smclk;
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//============================================================================
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//============================================================================
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// 2) REGISTER DECODER
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// 2) REGISTER DECODER
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Line 416... |
Line 415... |
omsp_and_gate and_dco_dis4 (.y(dco_disable_by_cpu_en), .a(~cpu_en_s), .b(~mclk_enable));
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omsp_and_gate and_dco_dis4 (.y(dco_disable_by_cpu_en), .a(~cpu_en_s), .b(~mclk_enable));
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omsp_and_gate and_dco_dis5 (.y(dco_enable_nxt), .a(~dco_disable_by_scg0), .b(~dco_disable_by_cpu_en));
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omsp_and_gate and_dco_dis5 (.y(dco_enable_nxt), .a(~dco_disable_by_scg0), .b(~dco_disable_by_cpu_en));
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// Register to prevent glitch propagation
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// Register to prevent glitch propagation
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reg dco_disable;
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reg dco_disable;
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always @(posedge nodiv_mclk_n or posedge por)
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wire dco_wkup_set_scan_observe;
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always @(posedge nodiv_mclk or posedge por)
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if (por) dco_disable <= 1'b1;
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if (por) dco_disable <= 1'b1;
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else dco_disable <= ~dco_enable_nxt;
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else dco_disable <= ~dco_enable_nxt | dco_wkup_set_scan_observe;
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// Optional scan repair
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wire dco_clk_n;
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`ifdef SCAN_REPAIR_INV_CLOCKS
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omsp_scan_mux scan_mux_repair_dco_clk_n (
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.scan_mode (scan_mode),
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.data_in_scan ( dco_clk),
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.data_in_func (~dco_clk),
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.data_out ( dco_clk_n)
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);
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`else
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assign dco_clk_n = ~dco_clk;
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`endif
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// Note that a synchronizer is required if the MCLK mux is included
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// Note that a synchronizer is required if the MCLK mux is included
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wire dco_clk_n = ~dco_clk;
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`ifdef MCLK_MUX
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`ifdef MCLK_MUX
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omsp_sync_cell sync_cell_dco_disable (
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omsp_sync_cell sync_cell_dco_disable (
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.data_out (dco_enable),
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.data_out (dco_enable),
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.data_in (~dco_disable),
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.data_in (~dco_disable),
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.clk (dco_clk_n),
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.clk (dco_clk_n),
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.rst (por)
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.rst (por)
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);
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);
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`else
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`else
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assign dco_enable = ~dco_disable;
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// Optional scan repair
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wire nodiv_mclk_n;
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`ifdef SCAN_REPAIR_INV_CLOCKS
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omsp_scan_mux scan_mux_repair_nodiv_mclk_n (
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.scan_mode (scan_mode),
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.data_in_scan ( nodiv_mclk),
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.data_in_func (~nodiv_mclk),
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.data_out ( nodiv_mclk_n)
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);
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`else
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assign nodiv_mclk_n = ~nodiv_mclk;
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`endif
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// Re-time DCO enable with MCLK falling edge
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reg dco_enable;
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always @(posedge nodiv_mclk_n or posedge por)
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if (por) dco_enable <= 1'b0;
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else dco_enable <= ~dco_disable;
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`endif
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`endif
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// The DCO oscillator will get an asynchronous wakeup if:
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// The DCO oscillator will get an asynchronous wakeup if:
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// - the MCLK generates a wakeup (only if the MCLK mux selects dco_clk)
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// - the MCLK generates a wakeup (only if the MCLK mux selects dco_clk)
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// - if the DCO wants to be synchronously enabled (i.e dco_enable_nxt=1)
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// - if the DCO wants to be synchronously enabled (i.e dco_enable_nxt=1)
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Line 453... |
Line 482... |
.data_in_func (dco_wkup_set | por),
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.data_in_func (dco_wkup_set | por),
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.data_out (dco_wkup_set_scan)
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.data_out (dco_wkup_set_scan)
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);
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);
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// Scan MUX to increase coverage
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// Scan MUX to increase coverage
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wire dco_wkup_clear;
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omsp_scan_mux scan_mux_dco_wkup_observe (
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omsp_scan_mux scan_mux_dco_wkup_clear (
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.scan_mode (scan_mode),
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.scan_mode (scan_mode),
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.data_in_scan (dco_wkup_set),
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.data_in_scan (dco_wkup_set),
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.data_in_func (1'b1),
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.data_in_func (1'b0),
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.data_out (dco_wkup_clear)
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.data_out (dco_wkup_set_scan_observe)
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);
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);
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// The wakeup is asynchronously set, synchronously released
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// The wakeup is asynchronously set, synchronously released
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wire dco_wkup_n;
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wire dco_wkup_n;
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omsp_sync_cell sync_cell_dco_wkup (
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omsp_sync_cell sync_cell_dco_wkup (
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.data_out (dco_wkup_n),
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.data_out (dco_wkup_n),
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.data_in (dco_wkup_clear),
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.data_in (1'b1),
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.clk (dco_clk_n),
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.clk (dco_clk_n),
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.rst (dco_wkup_set_scan)
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.rst (dco_wkup_set_scan)
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);
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);
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omsp_and_gate and_dco_wkup (.y(dco_wkup), .a(~dco_wkup_n), .b(cpu_en));
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omsp_and_gate and_dco_wkup (.y(dco_wkup), .a(~dco_wkup_n), .b(cpu_en));
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Line 510... |
Line 538... |
omsp_and_gate and_lfxt_dis4 (.y(lfxt_disable_by_cpu_en), .a(~cpu_en_s), .b(~mclk_enable));
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omsp_and_gate and_lfxt_dis4 (.y(lfxt_disable_by_cpu_en), .a(~cpu_en_s), .b(~mclk_enable));
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omsp_and_gate and_lfxt_dis5 (.y(lfxt_enable_nxt), .a(~lfxt_disable_by_oscoff), .b(~lfxt_disable_by_cpu_en));
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omsp_and_gate and_lfxt_dis5 (.y(lfxt_enable_nxt), .a(~lfxt_disable_by_oscoff), .b(~lfxt_disable_by_cpu_en));
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// Register to prevent glitch propagation
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// Register to prevent glitch propagation
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reg lfxt_disable;
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reg lfxt_disable;
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always @(posedge nodiv_mclk_n or posedge por)
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wire lfxt_wkup_set_scan_observe;
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always @(posedge nodiv_mclk or posedge por)
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if (por) lfxt_disable <= 1'b1;
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if (por) lfxt_disable <= 1'b1;
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else lfxt_disable <= ~lfxt_enable_nxt;
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else lfxt_disable <= ~lfxt_enable_nxt | lfxt_wkup_set_scan_observe;
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// Optional scan repair
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wire lfxt_clk_n;
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`ifdef SCAN_REPAIR_INV_CLOCKS
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omsp_scan_mux scan_mux_repair_lfxt_clk_n (
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.scan_mode (scan_mode),
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.data_in_scan ( lfxt_clk),
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.data_in_func (~lfxt_clk),
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.data_out ( lfxt_clk_n)
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);
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`else
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assign lfxt_clk_n = ~lfxt_clk;
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`endif
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// Synchronize the OSCOFF control signal to the LFXT clock domain
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// Synchronize the OSCOFF control signal to the LFXT clock domain
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wire lfxt_clk_n = ~lfxt_clk;
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omsp_sync_cell sync_cell_lfxt_disable (
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omsp_sync_cell sync_cell_lfxt_disable (
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.data_out (lfxt_enable),
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.data_out (lfxt_enable),
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.data_in (~lfxt_disable),
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.data_in (~lfxt_disable),
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.clk (lfxt_clk_n),
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.clk (lfxt_clk_n),
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.rst (por)
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.rst (por)
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Line 543... |
Line 584... |
.data_in_func (lfxt_wkup_set | por),
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.data_in_func (lfxt_wkup_set | por),
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.data_out (lfxt_wkup_set_scan)
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.data_out (lfxt_wkup_set_scan)
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);
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);
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// Scan MUX to increase coverage
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// Scan MUX to increase coverage
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wire lfxt_wkup_clear;
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omsp_scan_mux scan_mux_lfxt_wkup_observe (
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omsp_scan_mux scan_mux_lfxt_wkup_clear (
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.scan_mode (scan_mode),
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.scan_mode (scan_mode),
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.data_in_scan (lfxt_wkup_set),
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.data_in_scan (lfxt_wkup_set),
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.data_in_func (1'b1),
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.data_in_func (1'b0),
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.data_out (lfxt_wkup_clear)
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.data_out (lfxt_wkup_set_scan_observe)
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);
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);
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// The wakeup is asynchronously set, synchronously released
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// The wakeup is asynchronously set, synchronously released
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wire lfxt_wkup_n;
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wire lfxt_wkup_n;
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omsp_sync_cell sync_cell_lfxt_wkup (
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omsp_sync_cell sync_cell_lfxt_wkup (
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.data_out (lfxt_wkup_n),
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.data_out (lfxt_wkup_n),
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.data_in (lfxt_wkup_clear),
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.data_in (1'b1),
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.clk (lfxt_clk_n),
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.clk (lfxt_clk_n),
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.rst (lfxt_wkup_set_scan)
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.rst (lfxt_wkup_set_scan)
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);
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);
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omsp_and_gate and_lfxt_wkup (.y(lfxt_wkup), .a(~lfxt_wkup_n), .b(cpu_en));
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omsp_and_gate and_lfxt_wkup (.y(lfxt_wkup), .a(~lfxt_wkup_n), .b(cpu_en));
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Line 675... |
Line 715... |
.select_in (bcsctl2[`SELMx])
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.select_in (bcsctl2[`SELMx])
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);
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);
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`else
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`else
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assign nodiv_mclk = dco_clk;
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assign nodiv_mclk = dco_clk;
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`endif
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`endif
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assign nodiv_mclk_n = ~nodiv_mclk;
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// Wakeup synchronizer
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// Wakeup synchronizer
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//----------------------------
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//----------------------------
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wire cpuoff_and_mclk_dma_wkup_s;
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wire cpuoff_and_mclk_dma_wkup_s;
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