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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_dbg.v] - Diff between revs 136 and 149

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Rev 136 Rev 149
Line 34... Line 34...
//
//
// *Author(s):
// *Author(s):
//              - Olivier Girard,    olgirard@gmail.com
//              - Olivier Girard,    olgirard@gmail.com
//
//
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// $Rev: 103 $
// $Rev: 134 $
// $LastChangedBy: olivier.girard $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $
// $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
`ifdef OMSP_NO_INCLUDE
`ifdef OMSP_NO_INCLUDE
`else
`else
`include "openMSP430_defines.v"
`include "openMSP430_defines.v"
`endif
`endif
Line 419... Line 419...
//------------------   
//------------------   
 
 
wire        mem_cnt_wr  = reg_wr[MEM_CNT];
wire        mem_cnt_wr  = reg_wr[MEM_CNT];
 
 
wire [15:0] mem_cnt_dec = (mem_cnt==16'h0000)         ? 16'h0000 :
wire [15:0] mem_cnt_dec = (mem_cnt==16'h0000)         ? 16'h0000 :
                          (dbg_mem_acc | dbg_reg_acc) ? 16'hffff : 16'h0000;
                          (mem_burst & (dbg_mem_acc | dbg_reg_acc)) ? 16'hffff : 16'h0000;
 
 
always @ (posedge dbg_clk or posedge dbg_rst)
always @ (posedge dbg_clk or posedge dbg_rst)
  if (dbg_rst)         mem_cnt <=  16'h0000;
  if (dbg_rst)         mem_cnt <=  16'h0000;
  else if (mem_cnt_wr) mem_cnt <=  dbg_din;
  else if (mem_cnt_wr) mem_cnt <=  dbg_din;
  else                 mem_cnt <=  mem_cnt + mem_cnt_dec;
  else                 mem_cnt <=  mem_cnt + mem_cnt_dec;

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