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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_dbg_hwbrk.v] - Diff between revs 80 and 104

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Rev 80 Rev 104
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//
//
// *Author(s):
// *Author(s):
//              - Olivier Girard,    olgirard@gmail.com
//              - Olivier Girard,    olgirard@gmail.com
//
//
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// $Rev: 59 $
// $Rev: 103 $
// $LastChangedBy: olivier.girard $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2010-02-02 00:12:28 +0100 (Tue, 02 Feb 2010) $
// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
`include "timescale.v"
`ifdef OMSP_NO_INCLUDE
 
`else
`include "openMSP430_defines.v"
`include "openMSP430_defines.v"
 
`endif
 
 
module  omsp_dbg_hwbrk (
module  omsp_dbg_hwbrk (
 
 
// OUTPUTs
// OUTPUTs
    brk_halt,                // Hardware breakpoint command
    brk_halt,                // Hardware breakpoint command
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assign brk_halt     = brk_ctl[`BRK_EN] & |brk_stat_set;
assign brk_halt     = brk_ctl[`BRK_EN] & |brk_stat_set;
 
 
 
 
endmodule // omsp_dbg_hwbrk
endmodule // omsp_dbg_hwbrk
 
 
 
`ifdef OMSP_NO_INCLUDE
 
`else
`include "openMSP430_undefines.v"
`include "openMSP430_undefines.v"
 
`endif
 
 
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