URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_dbg_uart.v] - Diff between revs 80 and 85

Rev 80	Rev 85
Line 223...	Line 223...
`// Receive/Transmit buffer`	`// Receive/Transmit buffer`
`//-------------------------`	`//-------------------------`
`wire [19:0] xfer_buf_nxt = {rxd_s, xfer_buf[19:1]};`	`wire [19:0] xfer_buf_nxt = {rxd_s, xfer_buf[19:1]};`

`always @ (posedge mclk or posedge por)`	`always @ (posedge mclk or posedge por)`
`if (por) xfer_buf <= 18'h00000;`	`if (por) xfer_buf <= 20'h00000;`
`else if (dbg_rd_rdy) xfer_buf <= {1'b1, dbg_dout[15:8], 2'b01, dbg_dout[7:0], 1'b0};`	`else if (dbg_rd_rdy) xfer_buf <= {1'b1, dbg_dout[15:8], 2'b01, dbg_dout[7:0], 1'b0};`
`else if (xfer_bit_inc) xfer_buf <= xfer_buf_nxt;`	`else if (xfer_bit_inc) xfer_buf <= xfer_buf_nxt;`


`// Generate TXD output`	`// Generate TXD output`