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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_execution_unit.v] - Diff between revs 111 and 128

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//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// Copyright (C) 2001 Authors
// Copyright (C) 2009 , Olivier Girard
//
//
// This source file may be used and distributed without restriction provided
// Redistribution and use in source and binary forms, with or without
// that this copyright statement is not removed from the file and that any
// modification, are permitted provided that the following conditions
// derivative work contains the original copyright notice and the associated
// are met:
// disclaimer.
//     * Redistributions of source code must retain the above copyright
 
//       notice, this list of conditions and the following disclaimer.
 
//     * Redistributions in binary form must reproduce the above copyright
 
//       notice, this list of conditions and the following disclaimer in the
 
//       documentation and/or other materials provided with the distribution.
 
//     * Neither the name of the authors nor the names of its contributors
 
//       may be used to endorse or promote products derived from this software
 
//       without specific prior written permission.
//
//
// This source file is free software; you can redistribute it and/or modify
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// it under the terms of the GNU Lesser General Public License as published
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// by the Free Software Foundation; either version 2.1 of the License, or
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// (at your option) any later version.
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
//
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
// This source is distributed in the hope that it will be useful, but WITHOUT
// OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// License for more details.
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
//
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
// You should have received a copy of the GNU Lesser General Public License
// THE POSSIBILITY OF SUCH DAMAGE
// along with this source; if not, write to the Free Software Foundation,
 
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
 
//
//
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
//
//
// *File Name: omsp_execution_unit.v
// *File Name: omsp_execution_unit.v
// 
// 
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//
//
// *Author(s):
// *Author(s):
//              - Olivier Girard,    olgirard@gmail.com
//              - Olivier Girard,    olgirard@gmail.com
//
//
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// $Rev: 103 $
// $Rev: 117 $
// $LastChangedBy: olivier.girard $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $
// $LastChangedDate: 2011-06-23 21:30:51 +0200 (Thu, 23 Jun 2011) $
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
`ifdef OMSP_NO_INCLUDE
`ifdef OMSP_NO_INCLUDE
`else
`else
`include "openMSP430_defines.v"
`include "openMSP430_defines.v"
`endif
`endif
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                     (inst_type[`INST_TO] & inst_ad[`DIR] & ~inst_alu[`EXEC_NO_WR])  |
                     (inst_type[`INST_TO] & inst_ad[`DIR] & ~inst_alu[`EXEC_NO_WR])  |
                     (inst_type[`INST_SO] & inst_as[`DIR] & ~(inst_so[`PUSH] | inst_so[`CALL] | inst_so[`RETI])) |
                     (inst_type[`INST_SO] & inst_as[`DIR] & ~(inst_so[`PUSH] | inst_so[`CALL] | inst_so[`RETI])) |
                      inst_type[`INST_JMP])) | dbg_reg_wr;
                      inst_type[`INST_JMP])) | dbg_reg_wr;
 
 
wire reg_sp_wr    = (((e_state==`E_IRQ_1) | (e_state==`E_IRQ_3)) & ~inst_irq_rst) |
wire reg_sp_wr    = (((e_state==`E_IRQ_1) | (e_state==`E_IRQ_3)) & ~inst_irq_rst) |
                     ((e_state==`E_DST_RD) & ((inst_so[`PUSH] &  ~inst_as[`IDX] &
                     ((e_state==`E_DST_RD) & ((inst_so[`PUSH] | inst_so[`CALL]) &  ~inst_as[`IDX] & ~((inst_as[`INDIR] | inst_as[`INDIR_I]) & inst_src[1]))) |
                                                                ~((inst_as[`INDIR] | inst_as[`INDIR_I]) & inst_src[1])) |
                     ((e_state==`E_SRC_AD) & ((inst_so[`PUSH] | inst_so[`CALL]) &  inst_as[`IDX])) |
                                               inst_so[`CALL])) |
                     ((e_state==`E_SRC_RD) & ((inst_so[`PUSH] | inst_so[`CALL]) &  ((inst_as[`INDIR] | inst_as[`INDIR_I]) & inst_src[1])));
                     ((e_state==`E_SRC_AD) &  (inst_so[`PUSH] &  inst_as[`IDX])) |
 
                     ((e_state==`E_SRC_RD) &  (inst_so[`PUSH] &  ((inst_as[`INDIR] | inst_as[`INDIR_I]) & inst_src[1])));
 
 
 
wire reg_sr_wr    =  (e_state==`E_DST_RD) & inst_so[`RETI];
wire reg_sr_wr    =  (e_state==`E_DST_RD) & inst_so[`RETI];
 
 
wire reg_sr_clr   =  (e_state==`E_IRQ_2);
wire reg_sr_clr   =  (e_state==`E_IRQ_2);
 
 
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                          ((e_state==`E_EXEC)   &  inst_as[`DIR] & ~inst_type[`INST_JMP]);
                          ((e_state==`E_EXEC)   &  inst_as[`DIR] & ~inst_type[`INST_JMP]);
 
 
wire src_reg_dest_sel   =  (e_state==`E_IRQ_1)                    |
wire src_reg_dest_sel   =  (e_state==`E_IRQ_1)                    |
                           (e_state==`E_IRQ_3)                    |
                           (e_state==`E_IRQ_3)                    |
                          ((e_state==`E_DST_RD) & (inst_so[`PUSH] | inst_so[`CALL])) |
                          ((e_state==`E_DST_RD) & (inst_so[`PUSH] | inst_so[`CALL])) |
                          ((e_state==`E_SRC_AD) &  inst_so[`PUSH] & inst_as[`IDX]);
                          ((e_state==`E_SRC_AD) & (inst_so[`PUSH] | inst_so[`CALL]) & inst_as[`IDX]);
 
 
wire src_mdb_in_val_sel = ((e_state==`E_DST_RD) &  inst_so[`RETI])                     |
wire src_mdb_in_val_sel = ((e_state==`E_DST_RD) &  inst_so[`RETI])                     |
                          ((e_state==`E_EXEC)   & (inst_as[`INDIR] | inst_as[`INDIR_I] |
                          ((e_state==`E_EXEC)   & (inst_as[`INDIR] | inst_as[`INDIR_I] |
                                                   inst_as[`IDX]   | inst_as[`SYMB]    |
                                                   inst_as[`IDX]   | inst_as[`SYMB]    |
                                                   inst_as[`ABS]));
                                                   inst_as[`ABS]));
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wire dst_fffe_sel       =  (e_state==`E_IRQ_0)  |
wire dst_fffe_sel       =  (e_state==`E_IRQ_0)  |
                           (e_state==`E_IRQ_1)  |
                           (e_state==`E_IRQ_1)  |
                           (e_state==`E_IRQ_3)  |
                           (e_state==`E_IRQ_3)  |
                          ((e_state==`E_DST_RD) & (inst_so[`PUSH] | inst_so[`CALL]) & ~inst_so[`RETI]) |
                          ((e_state==`E_DST_RD) & (inst_so[`PUSH] | inst_so[`CALL]) & ~inst_so[`RETI]) |
                          ((e_state==`E_SRC_AD) &  inst_so[`PUSH] & inst_as[`IDX]) |
                          ((e_state==`E_SRC_AD) & (inst_so[`PUSH] | inst_so[`CALL]) & inst_as[`IDX]) |
                          ((e_state==`E_SRC_RD) &  inst_so[`PUSH] & (inst_as[`INDIR] | inst_as[`INDIR_I]) & inst_src[1]);
                          ((e_state==`E_SRC_RD) & (inst_so[`PUSH] | inst_so[`CALL]) & (inst_as[`INDIR] | inst_as[`INDIR_I]) & inst_src[1]);
 
 
wire dst_reg_dest_sel   = ((e_state==`E_DST_RD) & ~(inst_so[`PUSH] | inst_so[`CALL] | inst_ad[`ABS] | inst_so[`RETI])) |
wire dst_reg_dest_sel   = ((e_state==`E_DST_RD) & ~(inst_so[`PUSH] | inst_so[`CALL] | inst_ad[`ABS] | inst_so[`RETI])) |
                          ((e_state==`E_DST_WR) &  ~inst_ad[`ABS]) |
                          ((e_state==`E_DST_WR) &  ~inst_ad[`ABS]) |
                          ((e_state==`E_EXEC)   &  (inst_ad[`DIR] | inst_type[`INST_JMP] |
                          ((e_state==`E_EXEC)   &  (inst_ad[`DIR] | inst_type[`INST_JMP] |
                                                    inst_type[`INST_SO]) & ~inst_so[`RETI]);
                                                    inst_type[`INST_SO]) & ~inst_so[`RETI]);

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