URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_mem_backbone.v] - Diff between revs 80 and 104

Rev 80	Rev 104
Line 29...	Line 29...
`//`	`//`
`// *Author(s):`	`// *Author(s):`
`// - Olivier Girard, olgirard@gmail.com`	`// - Olivier Girard, olgirard@gmail.com`
`//`	`//`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`// $Rev: 37 $`	`// $Rev: 103 $`
`// $LastChangedBy: olivier.girard $`	`// $LastChangedBy: olivier.girard $`
`// $LastChangedDate: 2009-12-29 21:58:14 +0100 (Tue, 29 Dec 2009) $`	`// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`include "timescale.v"	`ifdef OMSP_NO_INCLUDE
	`else
`include "openMSP430_defines.v"	`include "openMSP430_defines.v"
	`endif

`module omsp_mem_backbone (`	`module omsp_mem_backbone (`

`// OUTPUTs`	`// OUTPUTs`
`dbg_mem_din, // Debug unit Memory data input`	`dbg_mem_din, // Debug unit Memory data input`
Line 239...	Line 241...
`dbg_mem_din_sel[0] ? per_dout_val : dmem_dout;`	`dbg_mem_din_sel[0] ? per_dout_val : dmem_dout;`


`endmodule // omsp_mem_backbone`	`endmodule // omsp_mem_backbone`

	`ifdef OMSP_NO_INCLUDE
	`else
`include "openMSP430_undefines.v"	`include "openMSP430_undefines.v"
	`endif

`No newline at end of file`	`No newline at end of file`