URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [sim/] [rtl_sim/] [src/] [submit.f] - Diff between revs 136 and 155

Rev 136	Rev 155
Line 78...	Line 78...
`../../../rtl/verilog/openmsp430/omsp_clock_module.v`	`../../../rtl/verilog/openmsp430/omsp_clock_module.v`
`../../../rtl/verilog/openmsp430/omsp_mem_backbone.v`	`../../../rtl/verilog/openmsp430/omsp_mem_backbone.v`
`../../../rtl/verilog/openmsp430/omsp_watchdog.v`	`../../../rtl/verilog/openmsp430/omsp_watchdog.v`
`../../../rtl/verilog/openmsp430/omsp_dbg.v`	`../../../rtl/verilog/openmsp430/omsp_dbg.v`
`../../../rtl/verilog/openmsp430/omsp_dbg_uart.v`	`../../../rtl/verilog/openmsp430/omsp_dbg_uart.v`
	`../../../rtl/verilog/openmsp430/omsp_dbg_i2c.v`
`../../../rtl/verilog/openmsp430/omsp_dbg_hwbrk.v`	`../../../rtl/verilog/openmsp430/omsp_dbg_hwbrk.v`
`../../../rtl/verilog/openmsp430/omsp_multiplier.v`	`../../../rtl/verilog/openmsp430/omsp_multiplier.v`
`../../../rtl/verilog/openmsp430/omsp_sync_reset.v`	`../../../rtl/verilog/openmsp430/omsp_sync_reset.v`
`../../../rtl/verilog/openmsp430/omsp_sync_cell.v`	`../../../rtl/verilog/openmsp430/omsp_sync_cell.v`
`../../../rtl/verilog/openmsp430/omsp_scan_mux.v`	`../../../rtl/verilog/openmsp430/omsp_scan_mux.v`